SNEHA SHARMA
Bangalore
Summary
Motivated engineer recognized for strong critical thinking and problem-solving abilities coupled with successful several-year track record in industry. Dedicated to offering innovative solutions to eliminate legacy issues and elevate performance metrics. Diligent creator of innovative workflows and exceptional final products.
Overview
5
5
years of professional experience
Work History
Staff Engineer
Synopsys India Pvt. Limited
Bengaluru
02.2020 - Current
- Conducted Sense-amp Analysis, Bit-cell Analysis, Design QA, and Logic Margins simulations for TSMC 7nm memory compiler (1port register file)
- Executed RM and WM Margin simulations, analyzed Level shifter performance, and performed Design QA for TSMC's 5nm Memory Compiler.
- Performed atspeed correlation for power, leakage, and scan timing analysis on UMC 22ULP compiler.
- Implemented characterization flow for N5 ROM, single port SRAM and 2 port Register file.
Engineer I
Invecas Technologies
Bengaluru
01.2020 - 02.2020
- Simultaneously held positions as an intern at Whizchip Technologies and a contributor to projects at Invecas Technologies.
- Performed Static Timing Analysis on GF12 compilers while working as a contractor for Invecas and continued this work after transitioning to a Full Time Employee
Design Engineer Trainee
Whizchip Technologies Pvt. Ltd.
Bengaluru
09.2019 - 12.2019
- Developed handtiles for 12LP memory compilers and executed schematic-based simulations covering cycle time, access time, wake-up simulation, and dynamic power. Carried out static timing analysis (STA) on memory compilers.
- Developed and utilized ESP-CV simulation for IP verification, identifying and resolving design issues.
Education
M.Tech - Digital Communication
Maulana Azad National Institue of Technology
B.Tech - Electronics and Communication Engineering
Guru Ghasidas University
Skills
- WINDOWS
- Linux
- System Verilog
- Hspice
- Xa
- Shell scripting
- TCL
- Virtuoso
- Integrator
- Cdesigner
- Webchar
- GF-12LP
- 22FDSOI
- TSMC7nm
- TSMC5nm
- UMC22ULP
- TSMC5nm AUTO
- TSMC12nm
- TSMC12nm AUTO
Personal Information
Date of Birth: 07/01/1994
Languages
Hindi
First Language
English
Upper Intermediate (B2)
B2
Affiliations
- I like dancing , listening to music, playing badminton and travelling once in a while
Timeline
Staff Engineer
Synopsys India Pvt. Limited
02.2020 - Current
Engineer I
Invecas Technologies
01.2020 - 02.2020
Design Engineer Trainee
Whizchip Technologies Pvt. Ltd.
09.2019 - 12.2019
M.Tech - Digital Communication
Maulana Azad National Institue of Technology
B.Tech - Electronics and Communication Engineering
Guru Ghasidas University
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