Summary
Overview
Work History
Education
Skills
Certification
Training
Timeline
Generic
Suban Sab

Suban Sab

Bangalore

Summary

Rail Signalling Manager with 19 years of experience in safety-critical railway signaling for main line and metro projects. Demonstrated leadership in managing projects through all phases, ensuring adherence to safety standards and regulations. Skilled in process optimization to improve efficiency and reliability in signaling operations.

Overview

19
19
years of professional experience
1
1
Certification

Work History

Manager Signalling

Wabtec Corporation India Pvt.Ltd.
Bangalore
01.2023 - Current
  • Oversaw team of 10 members, managing tendering, design, testing support, and project execution.
  • Achieved Australia Rail Track Corporation (ARTC) SOC Level 2 certification in Design and Checking.
  • Conducted ALDS document checks and ensured accuracy through updated comments.
  • Executed TCS bit list verification to maintain data integrity throughout processes.
  • Reviewed MLK II IO data for compliance with established specifications.
  • Analyzed interlocking locations ES438ZB, ES587ZB, DBK4ZB, and KME4ZB for MLK II data design integrity.
  • Prepared functional specifications for ARTC Signalling at Peak School Rd & Wests Rd.
  • Designed Bayswater Interlocking MLK II data and MLK IO data across all locations.

V&V Lead Manager

Alstom Transport India Limited
01.2021 - 01.2023
  • Managed project tendering and resource allocation for DS Project Australia and NEL and CCL Metro Project Singapore.
  • Led V&V team activities, including script preparation and data validation for multiple baselines.
  • Coordinated with customers and internal departments to ensure seamless delivery quality.
  • Conducted CT testing for DS Project and CCL6 Project, ensuring compliance with specifications.
  • Oversaw requirement verification, project management, and team leadership for optimal performance.
  • Verified various test reports and V&V documents to uphold project standards.
  • Executed interlocking data validation for NEL and CCL Metro projects in Singapore.

Senior Lead Design Engineer

Arcadis India Ltd.
Bangalore
01.2020 - 01.2021
  • Designed and verified systems for Yanchep Rail Extension and Thornlie-Cockburn Link projects.
  • Led teams in delivering Metronet PTA projects while managing resources effectively.
  • Managed MLK II data team to fulfill PTA project requirements efficiently.
  • Conducted production checks on Microlok system configuration and architecture.
  • Prepared documentation for headway simulation and installation plans.
  • Developed control table specific to Thornlie-Cockburn Link project area.
  • Produced MLK data for Yanchep and Butler area location IO and interlocking data.
  • Verified updates of MLK data for Belmont Park station and Yanchep IO.

Work Package Leader (WPL)

Ansaldo STS Bangalore
Bangalore
01.2018 - 01.2020
  • Led Noida Metro ATS team and Taiwan Metro projects, ensuring timely delivery and quality standards.
  • Managed ATS Bangalore team, optimizing resource utilization across multiple projects.
  • Coordinated customer communications and internal department interactions to enhance delivery effectiveness.
  • Oversaw project management and interdepartmental coordination to streamline operations.
  • Supported ATS site testing to address site failures and improve performance outcomes.
  • Closed all project requirements for Noida Metro, ensuring compliance with specifications.
  • Conducted thorough checks on Indian Railway MLK II Interface Circuit book for accuracy.

Senior Design Engineer

Siemens Rail Automation Pvt. Ltd.
Bangalore
01.2014 - 01.2018
  • Led team for successful management and delivery of Indian railway and New York Metro projects.
  • Managed resources effectively to optimize project execution and outcomes.
  • Facilitated communication between customers and internal departments to ensure quality delivery.
  • Provided site testing, installation support, and commissioning assistance for projects.
  • Conducted independent checks on vital interface circuits and application logic for electronic interlocking systems.
  • Coordinated design activities for IFAT, CFAT, and SAT with site engineers and clients.
  • Developed and verified application logic using Modicon PLC to implement CBTC concepts according to NYCT signaling standards.
  • Verified interface circuits for New York City Transit projects.

Lead Senior Design Engineer

JMDR Australia
Sydney
01.2012 - 01.2014
  • Designed Microlok-II Vital Interface Circuits for Mount Victoria Interlocking project.
  • Prepared MLK II Bit chart to assist in circuit design.
  • Conducted MLK-II Application Data Design to ensure accuracy and efficiency.
  • Developed Typical Interface Circuits to meet project specifications.
  • Led initial input preparation in Sydney for successful project execution.
  • Executed Stage 1B design for Mount Victoria Interlocking, meeting client standards.
  • Collaborated with Sydney Trains NSW to ensure alignment with project goals.

Design Engineer

Ansaldo STS Bangalore
Bangalore
01.2007 - 01.2012
  • Led site installation and testing for Indian Railway projects, ensuring successful commissioning.
  • Managed resources effectively to optimize project delivery and team performance.
  • Oversaw maintenance of interlocking systems at South Central Railway stations.
  • Designed system configurations aligned with SRS requirements.
  • Created Microlok II interface circuits compatible with field signaling equipment.
  • Developed application logic programs for Microlok II interlocking systems.
  • Formulated control tables to enhance system functionality.
  • Conducted factory acceptance tests (FAT) followed by site installation, testing, and commissioning.

Education

B.E - Electronics and Communication

BIET
07-2006

Skills

  • Microlok II system design
  • Westrace system design
  • CBTC systems
  • Interlocking systems
  • Technical documentation
  • Test execution
  • Compliance verification
  • Functional specifications
  • Data validation
  • System design
  • Effective communication
  • Customer coordination
  • Time management
  • Quality control
  • Project planning
  • Team collaboration
  • Process improvement
  • Engineering documentation
  • Project estimation
  • Budget management
  • Automated testing
  • Feasibility analysis
  • Critical thinking
  • Data analysis
  • Team leadership

Certification

  • ARTC SOC Level 2
  • IRSE 1.1.510V1 UK Designer License (renewal required)
  • Nominated for Excellent Performance Award in Siemens India Ltd.
  • Associated Member of Institute Railway Signal Engineers UK (AMIRSE)

Training

Undergone Training on Microlok-II and West Race System and Application Logic

Timeline

Manager Signalling

Wabtec Corporation India Pvt.Ltd.
01.2023 - Current

V&V Lead Manager

Alstom Transport India Limited
01.2021 - 01.2023

Senior Lead Design Engineer

Arcadis India Ltd.
01.2020 - 01.2021

Work Package Leader (WPL)

Ansaldo STS Bangalore
01.2018 - 01.2020

Senior Design Engineer

Siemens Rail Automation Pvt. Ltd.
01.2014 - 01.2018

Lead Senior Design Engineer

JMDR Australia
01.2012 - 01.2014

Design Engineer

Ansaldo STS Bangalore
01.2007 - 01.2012

B.E - Electronics and Communication

BIET
Suban Sab