Summary
Overview
Work History
Education
Skills
Websites
Awards
Timeline
Generic

Sumit Somani

Pune

Summary

Results-driven QA Automation Engineer with over 9 years of experience in the semiconductor industry, specializing in Python/Pytest automation frameworks, NVMe SSDs, and next-generation accelerators. Expertise in developing scalable validation infrastructures from FPGA bring-up to qualification across SSD, RAID, and CXL domains. Demonstrated success in designing modular frameworks that have tripled automation efficiency, along with a proven ability to quickly adapt to emerging technologies. Committed to delivering high-quality solutions that drive operational excellence and innovation in fast-paced environments.

Overview

10
10
years of professional experience

Work History

Staff Engineer

Marvell Technology
04.2022 - Current
  • Architected a Python/Pytest automation framework for validating next-gen NVMe accelerators.
  • Built support for multi-host and multi-PF environments with YAML/JSON-driven configs.
  • Designed fixtures, parameterized tests, and HTML/JSON reporting modules.
  • Established pre-commit, post-commit, and nightly regression flows; executed and monitored Jenkins jobs.
  • Collaborated with firmware teams for feature validation, debug, and performance reproduction.
  • NVMe Accelerator (2025–Present)
  • SSD RAID Controller (2024)
  • Automated RAID 0/1 validation covering rebuild, degraded mode, and recovery logic.
  • Designed fault injection and power-loss scenarios to validate recovery under stress.
  • NVMe SSD Validation (2023)
  • Developed Python wrappers for nvme-cli enabling reusable NVMe command validation.
  • Collected and analyzed performance data using dd and iostat to identify regressions.
  • Logged issues and tracked validation progress using JIRA for traceability.
  • CXL Type-3 Memory Expansion (2022–2023)
  • Built Python libraries for enumeration, BARs, mailbox transactions, poison injection, and health monitoring.
  • Designed nightly regression flows; supported FPGA/silicon bring-up with architects and FW engineers.

Senior Engineer

06.2021 - 02.2022
  • Developed a Pytest-based automation framework for NVMe SSD validation covering admin commands, log validation, and endurance testing.
  • Contributed to POCs and knowledge sharing across the SSD/NVMe ecosystem.
  • SSD Flash Storage

Engineer

01.2018 - 06.2021
  • Validation for 10G–100G NICs including VLAN, L2 switching, tunneling (VXLAN/GRE), and RDMA (RoCE/iWARP).
  • Built Python/Shell automation for SR-IOV, VF migration, and congestion control.
  • Performed packet-level debug with Wireshark and Finisar Analyzer.
  • Ethernet NIC & RDMA Validation

Associate Engineer

Cavium (QLogic)
06.2016 - 12.2017
  • Executed validation plans for Ethernet NIC features and release-level regressions.
  • Enhanced product reliability through thorough testing, quality control measures, and regular maintenance.
  • Collaborated with cross-functional teams to develop and implement engineering projects on time and within budget.
  • Supported project management initiatives through detailed documentation, scheduling, and progress tracking.

Intern

QLogic
11.2015 - 06.2016
  • Assisted in NIC validation, lab setup, bug reproduction, and regression test execution.
  • Supported defect reproduction and debugging for development cycles.

Education

B.E. - Computer Engineering

Pune University
01.2015

Senior Secondary (XII) - undefined

CBSE
01.2011

Skills

  • Automation: Python, Pytest, YAML/JSON configs, Git, Jenkins

  • Storage & Compute: NVMe, SSD, NAND Flash, RAID (0/1), CXL Type-3 Memory

  • Networking: Ethernet (10G–100G), RDMA (RoCE v1/v2, iWARP), VXLAN, GRE, SR-IOV

  • Validation Tools: nvme-cli, dd, iostat, Wireshark, Finisar Analyzer

  • QA Practices: Test framework design, regression automation, bug triage, performance validation

  • Collaboration Tools: JIRA, Confluence, IBM ClearQuest

Websites

Awards

Designed modular automation frameworks that improved efficiency by 3×., Applauded for fast ramp-up and delivery in new domains (SSD, CXL)., Recognized for ownership, quality, and cross-team collaboration.

Timeline

Staff Engineer

Marvell Technology
04.2022 - Current

Senior Engineer

06.2021 - 02.2022

Engineer

01.2018 - 06.2021

Associate Engineer

Cavium (QLogic)
06.2016 - 12.2017

Intern

QLogic
11.2015 - 06.2016

Senior Secondary (XII) - undefined

CBSE

B.E. - Computer Engineering

Pune University

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Sumit Somani