Summary
Overview
Work History
Education
Skills
Personal Information
Extracurricular Activities
Hobbies and Interests
Languages
Timeline
Generic

SYEDA AMENA SAMREEN

Bangalore

Summary

Experienced SoC Validation Engineer with a strong background in verifying complex semiconductor designs at Intel. Proven expertise in test planning and executing validation strategies using industry-standard methodologies. Skilled in debugging and resolving issues to ensure SoC functionality and performance meets stringent quality standards. Collaborative team player with effective communication skills and a track record of delivering successful SoC products.

Overview

4
4
years of professional experience

Work History

SOC Validation Engineer

Intel Corporation
08.2021 - Current
  • Involved in pre-silicon activities (validating configurations on SIMICS before post-silicon) for Intel SOC Project
  • Led validation activities (E2E Validation of 2 Security Features) for multiple Intel SoC projects, ensuring on-time project delivery
  • Developed comprehensive test plans to verify functional and performance requirements of SoC designs
  • Executed test cases with Cross product Coverage Manually and on Automation platform validating compliance with industry standards
  • Implemented debugging techniques (Trace Hub and Debug scripts) to identify and resolve complex issues, ensuring robustness and reliability of SoC products
  • Collaborated closely with design and Firmware teams to identify and resolve bugs
  • Documented test results and provided clear reports
  • Collaborated closely with design and Firmware teams to analyze test results and drive necessary design improvements
  • Contributed to the enhancement of validation methodologies and best practices within the team
  • Documented Security Features Enabling steps, Debug techniques, Tool information
  • Driven Daily Task Force with all Counterparts (Architects and Firmware teams) to Track and resolve all Security Issues.

Graduate Technical Intern

Intel Corporation
08.2020 - 06.2021
  • Assisted in the development of testbenches and test cases of Intel SoC designs
  • Conducted regression testing and regression failure debug for different branches and merged VDB’s of regressions, analyzing Coverage numbers and documented test results to support validation engineers in debugging and verification activities
  • Developed a dynamic register access test sequence for verifying Register’s R/W access
  • Analyzed and reported the Simulation Profiling for the Test Bench
  • Generated a Coverage Model for a specific feature
  • Developed Scripts for automation which saved 50% of our time
  • Contributed to the verification plan and test strategy discussions
  • Collaborated with senior engineers to enhance verification methodologies and streamline processes
  • Used OVM/UVM for Functional Verification, DVE for RTL and waveform debug, Verdi for Coverage analysis, VCS for Compile flow and test runs and Perl for Automation.

Education

Master of Technology in VLSI Design -

MSRIT, Bengaluru
06.2021

Bachelor of Technology in Electronics and Communication Engineering -

BITM, Ballari
08.2017

Skills

  • Hardware Description Languages: Verilog, System Verilog (Basic)
  • Scripting Languages: Python, Perl
  • SoC Architectures: x86
  • Computer Architecture
  • CPU Memory subsystems
  • Debug Tools: VCS,GDB,ITH,Verdi
  • Post-Silicon Validation Methodologies
  • Test Plan Development, Execution and Debugging
  • System-Level Validation
  • Test Automation
  • FPGA and ASIC Design Flow
  • Problem-Solving and Analytical Thinking
  • Teamwork and Collaboration
  • Time Management
  • Multitasking Abilities

Personal Information

Title: System Validation Engineer

Extracurricular Activities

Participated in State Level Art Competition. Participated as social volunteer in mass awareness against Cancer Eradication and Control. Participated in general knowledge Aptitude Talent Search Test. Participated in National Level Technical Quiz event.

Hobbies and Interests

  • Drawing
  • Playing Handball
  • Traveling

Languages

English
Advanced (C1)
Hindi
Advanced (C1)

Timeline

SOC Validation Engineer

Intel Corporation
08.2021 - Current

Graduate Technical Intern

Intel Corporation
08.2020 - 06.2021

Bachelor of Technology in Electronics and Communication Engineering -

BITM, Ballari

Master of Technology in VLSI Design -

MSRIT, Bengaluru

Similar Profiles

CREATE PROFILE
SYEDA AMENA SAMREEN