Summary
Overview
Work History
Education
Skills
Awards
Timeline
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Tanay Srivastava

Verification Engineer

Summary

As an experienced Verification Engineer with an experience of 4.5 years, I excel in delivering complex projects with precision and efficiency. My analytical skills, attention to detail, and proficiency in industry-standard verification tools make me an invaluable asset to any team. With excellent communication and collaboration skills, I work effectively with cross-functional teams. My passion for problem-solving and continuous learning ensures top-notch quality work.

Overview

5
5
years of professional experience

Work History

Senior Engineer

Infineon Technologies
12.2021 - Current

As a Senior Engineer at Infineon Technologies in India, I have had the opportunity to utilize my skills and expertise in various projects and teams. In this role, I have been able to contribute to the success of the company by consistently delivering high-quality work and implementing innovative solutions.

  • Worked on Full Chip and Subsystem Verification of complex projects involving end-to-end verification of Custom Silicon Projects from Test Planning to successful TO.
  • Responsible for IP integration in Full Chip.
  • Contributed to ROM Verification for a Custom Silicon Project and developing a predictor logic for the same.
  • Creating tests and sequences using UVM Methodology at Subsystem Verification.
  • Porting test cases from Subsystem and Full Chip TestBench.
  • Mentored junior engineers.
  • Collaborated with global teams.

Senior Engineer

Samsung Semiconductor India Research
09.2019 - 11.2021

At Samsung Semiconductor India Research, as a Senior Engineer, I worked on verification on different DDR-PHY.

  • Worked on IP Verification of DDR-PHY
  • Worked on Developing the Test Plan
  • Creating tests and sequences using UVM Methodology
  • Defining the cover groups, coding and reaching 100 % Code and Functional Coverage.
  • Finding Functional Bugs and getting it resolved with RTL owners

Intern

Synopsys India Pvt. Ltd
01.2019 - 09.2019
  • Worked on MBIST technique (DFT)
  • Responsible for developing the regression mechanism.

Education

M.Tech - Electronic System Design

International Institute of Information Technology
Bengaluru, India
04.2001 -

B.Tech - Electronics And Instrumentation

SRMCEM
Lucknow
04.2001 -

Skills

    HDL/HVL - System Verilog , Verilog

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Awards

  • Received SPOT award at Infineon Technologies

Timeline

Senior Engineer

Infineon Technologies
12.2021 - Current

Senior Engineer

Samsung Semiconductor India Research
09.2019 - 11.2021

Intern

Synopsys India Pvt. Ltd
01.2019 - 09.2019

M.Tech - Electronic System Design

International Institute of Information Technology
04.2001 -

B.Tech - Electronics And Instrumentation

SRMCEM
04.2001 -
Tanay SrivastavaVerification Engineer