Highly motivated ASIC Design Verification Engineer with a solid understanding of digital design principles and functional verification. Proficient in Verilog, SystemVerilog, and simulation-based verification with strong debugging and analytical skills. A quick learner who collaborates effectively within teams and is committed to developing robust verification environments while ensuring design correctness and quality.
Contributed to the development of an SD-WAN (Software-Defined Wide Area Network) solution by developing embedded firmware, modifying the Linux kernel, and integrating new device drivers. Performed device configuration, debugging, and feature validation while collaborating with cross-functional teams to enhance system performance, reliability, and network connectivity.