Summary
Overview
Work History
Education
Skills
Accomplishments
Timeline
Generic

Varsha Bhupal Bavache

Bengaluru

Summary

Experienced System Engineer specializing in system design and RTL development, particularly in GPS and high-performance computing projects. Skilled in utilizing script-based RTL generation and managing requirements to achieve streamlined processes and successful project delivery.

Overview

10
10
years of professional experience

Work History

Systems Engineer

SiPearl GmbH
Duisburg, Germany | Bengaluru, India
06.2021 - Current
  • Conceptualization of system control unit in a high-performance, general-purpose processor design.
  • Defining memory map architecture for the control processor.
  • Support for Integration of communication interfaces, peripherals IPs, and PCIe.
  • Development of technical document for design requirements.
  • Manage specifications and requirements of the project.

Hardware Developer

Hensoldt Cyber GmbH
Munich
09.2020 - 02.2021
  • Implementation of Continuous Integration flow for hardware developers.
  • RTL Development of memory control unit.

Senior Systems Engineer

Accord Software and Systems Private Limited
Bengaluru
01.2018 - 08.2018
  • Define verification specifications.
  • Development of MATLAB model to acquire GPS signals.
  • Coordination for RTL sign-off.

Systems Engineer

Accord Software and Systems Private Limited
Bengaluru
01.2015 - 12.2017
  • Define the architecture of GNSS baseband processor.
  • RTL development of DSP units and block-level simulation.
  • Clock domain crossing analysis.
  • FPGA prototyping of GNSS baseband processor.

Education

Master of Science - Communication Engineering

Techinical University of Munich
Munich, Germany
03-2021

Bachelor of Engineering - Electronics And Communication

S.G.Balekundri Institute of Technology
Belagavi, India
07-2014

Skills

  • Hardware language: VHDL, SystemVerilog
  • Scripting language: Python
  • Simulation tools: ModelSim/QuestaSim
  • FPGA tools: Xillinx Vivado
  • Version controllers: SVN, GIT
  • Requirement tools: Polarion, Jira

Accomplishments

  • Patent: Sequential chip mixed frequency correlator array system
  • Innovation towards low power and low area digital system architecture for GNSS receiver

Timeline

Systems Engineer

SiPearl GmbH
06.2021 - Current

Hardware Developer

Hensoldt Cyber GmbH
09.2020 - 02.2021

Senior Systems Engineer

Accord Software and Systems Private Limited
01.2018 - 08.2018

Systems Engineer

Accord Software and Systems Private Limited
01.2015 - 12.2017

Master of Science - Communication Engineering

Techinical University of Munich

Bachelor of Engineering - Electronics And Communication

S.G.Balekundri Institute of Technology
Varsha Bhupal Bavache