VIJAY KUMAR R
Bengaluru
Summary
With over 14 years of experience, I specialize in the demanding field of physical design verification for cutting-edge System-on-Chips (SoCs). My expertise lies in ensuring the robustness and accuracy of complex semiconductor designs with a strong focus on advanced technology nodes. I have a proven track record in executing sign-off checks, achieving critical block convergence, and contributing to domains such as PDN, floor planning, and RDL.
In addition to my technical expertise, I excel in managing multiple projects, fostering team development, and maintaining effective communication. Proficient in EDA tools and scripting, I leverage automation and collaboration to drive efficiency, and ensure the seamless delivery of high-quality designs.
Overview
14
14
years of professional experience
Work History
Staff Engineer/Manager
Qualcomm India Private Limited
Bengaluru
11.2016 - Current
- SoC/HM PV Expertise: Experienced in verifying the physical aspects of complex System-on-Chips (SoCs), including DRC, LVS, ERC, PERC, density, antenna, and DFM checks.
- My expertise lies in addressing multi-hierarchical HM integration challenges, and achieving HM PV convergence. I'm highly skilled in debugging intricate issues related to DRC, antenna, LVS, and netlist checks, particularly within the latest technology nodes (4 nm and 3 nm).
- Cross-domain activities: As a key member of the Signoff team, I have actively contributed to various multi-domain activities, including PDN, RDL, IOPAD, SOC–FT, and NON-FT processes (Pre-route and TI/TB insertion). I have consistently delivered high-quality execution across these domains.
- Efficiency and Methodology Improvements: I have worked on multiple automations to reduce the team’s manual effort significantly.
- Leading the Way: As an HMPV Lead, I oversee the convergence and seamless delivery of hard macros (HMs) to the System-on-Chip (SoC). Successfully Collaborated with multiple Physical Design (PD) teams, including those specializing in high-speed cores, CPUs, GPUs, and 5G modems.
Senior Engineer HW
Intel Technology India Pvt. Ltd
Bengaluru
05.2015 - 11.2016
Project Engineer
Wipro Technologies
Bengaluru
05.2011 - 05.2015
Education
Bachelor of Engineering - Electronics And Communication Engineering
Y.D.I.T, VTU
Bangalore06-2010
Skills
- SOCPV/HMPV Setup and Signoff
- Critical Block Convergence
- Signoff Checks Debug Expertise
- Multi-Project Handling and Team Building
- Effective communication and mentorship
- Exposure to industry-standard EDA tools such as Calibre, FC, and Innovus
- Knowledge of scripting languages - TCL and PERL
- Exposure to SOC floorplan and non-FT (RDL, pre-routes, and IO pad ring)
- Knowledge of the PDN concept and analysis
Accomplishments
- Involved in 25 or more tape-outs
- Worked on lower-tech nodes such as TSMC >3/4/6/7 nm ; Samsung → 5/8/10/11 nm; Intel → 14 nm/28 nm
- Handled multi-domain activities: PV, PDN, RDL, IOPAD, NON_FT, FT
- I have received several recognitions for my excellent contributions to projects in my previous organizations, including over 100 THANKQ recognitions, Qual-Star, star performer, and service recognition
Timeline
Staff Engineer/Manager
Qualcomm India Private Limited
11.2016 - Current
Senior Engineer HW
Intel Technology India Pvt. Ltd
05.2015 - 11.2016
Project Engineer
Wipro Technologies
05.2011 - 05.2015
Bachelor of Engineering - Electronics And Communication Engineering
Y.D.I.T, VTU
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