Summary
Overview
Work History
Education
Skills
Websites
Publications
Patent(s)
Professional Membership
Timeline
Generic

Vishvajit Bakarola

Bardoli

Summary

Dynamic professional with a strong foundation in system development and machine learning, honed during my tenure at E-Tech Solutions Ltd. Proven ability to innovate, exemplified by the successful deployment of a solar power system at Pegasus Semiconductor. Adept at Python programming and fostering collaborative environments to drive project success.

Overview

5
5
years of professional experience

Work History

Assistant Professor

Department of Computer Engineering, Uka Tarsadia University
Bardoli
01.2011 - 12.2012
  • Presently serving the Department of Computer Engineering of C. G. Patel Institute of Technology of an university as an assistant professor
  • Member of University National Assessment and Accreditation Council Committee (NAAC)
  • Institute member of Research and Development Cell
  • Institute Co-convener of National Board of Accreditation (NBA) Committee

Product Manager (Visiting)

Pegasus Semiconductor Ltd.
Ahmedabad
01.2011 - 08.2012
  • Developed the product of solar power based electricity generation system for village use named ‘Surya Deep’
  • The product has been deployed in various villages of Gujarat and Rajasthan, states of India

Lecturer

Faculty of Engineering Technology and Research, Gujarat Technological University
Bardoli
07.2010 - 10.2010
  • After completion of the Bachelor served as lecture in department of computer engineering

Developer (Intern)

E-Tech Solutions Ltd. (Hq. Texas)
Infocity
12.2009 - 02.2010
  • System developer at Texas based service provider organisation
  • Implemented desktop based searching solution for client’s call records. E-Tech used the solution for addressing their current manual system to trace and find the recorded calls

Design Intern

KRIBHCO Krishak Bharti Co-operative Ltd.
Hazira
12.2007 - 05.2008
  • Implemented KRIBHCO inventory stock management system with .NET framework for MIS department of an organization

Education

Ph.D. - Computer Engineering

Uka Tarsadia University
Gujarat
05-2024

Masters - Computer Engineering

Gujarat Technological University
Surendranagar, Gujarat
06.2013

Bachelors - Computer Science

MIT, Rajiv Gandhi Technological University
Indore, Madhyapradesh
06.2011

Diploma - Computer Engineering

Technical Examination Board
Gandhinagar, Gujarat
06.2008

Skills

  • Machine learning
  • Data analysis
  • AI integration
  • System development
  • User experience design
  • Python programming
  • Natural language processing
  • TensorFlow proficiency
  • Robotics engineering
  • Software development
  • Genetic algorithms
  • Python coding

Publications

  • Computational Representation of Paninian Rules of Sanskrit Grammar for Dictionary-Independent Machine Translation - IEC, Gazibad - Springer, 2019
  • Neural Machine Translation System of Indic Languages - An Attention based Approach - SMIT, Sikkim - IEEE, 2019
  • Simulating the Paninian System of Word Formation in Sanskrit with Computational Linguistics for effective Machine Translation - UPES, Dehradun - Springer, 2018
  • An Efficient Approach of Knowledge Representation using Paninian Rules of Sanskrit Grammar - NIT, GOA - SPRINGER, 2017
  • Neural Machine Translation system for Indic Languages using Deep Neural Architecture - UPES, Dehradun, India - SPRINGER, 2017
  • An Approach of Knowledge Representation with Dhatu-Roop using Paninian Rules of Sanskrit Grammar - Tirunavelli, T. N., India - IEEE, 2017
  • An Optimal Approach of Image Recognition using Deep Convolutional Architecture - NIT, GOA - SPRINGER, 2017
  • Image Captioning Using Deep Neural Architecture - IEEE, India, 2017
  • A Study on Computational Representation of Paninian Grammar based on Natural Language Processing - IEEE, India, 2017
  • Brain Computer Interface for detecting Brain activity and controlling an external object - NCRAES (ISSN: 978-93-83767-30-4), Gujarat, India, 2016
  • Home Automation System based on voice recognition - NCRAES (ISSN: 978-93-83767-30-4), Gujarat, India, 2016
  • Development of 8085 microprocessor based output port and implementation using real components - JEDR (ISSN: 2321-9939), 2014

Patent(s)

  • Traffic Collision Notification System - Indian Patent Office - (201821023472) Published on 2020-01-24
  • The present invention relates to a barricade system which comprises of signal broadcasting unit and receiver unit/vehicle unit. The barricade system notifies the user about the traffic collision and/or surrounding environment of traffic collision well in advance without reaching on the collision site to avoid multiple-vehicle collision. The said system further used for traffic density identification and notification on the vehicle unit

Professional Membership

  • Life time Member of Institution of Engineers, Kolkata, India, IE, India
  • Member of Institute of Electrical and Electronic Engineering, IEEE, USA
  • Member of Association for Computing Machinery (ACM), ACM, USA
  • Member of Computer Society of India, CSI, Chennai
  • International Neural Network Society (INNS), INNS, Europe

Timeline

Assistant Professor

Department of Computer Engineering, Uka Tarsadia University
01.2011 - 12.2012

Product Manager (Visiting)

Pegasus Semiconductor Ltd.
01.2011 - 08.2012

Lecturer

Faculty of Engineering Technology and Research, Gujarat Technological University
07.2010 - 10.2010

Developer (Intern)

E-Tech Solutions Ltd. (Hq. Texas)
12.2009 - 02.2010

Design Intern

KRIBHCO Krishak Bharti Co-operative Ltd.
12.2007 - 05.2008

Ph.D. - Computer Engineering

Uka Tarsadia University

Masters - Computer Engineering

Gujarat Technological University

Bachelors - Computer Science

MIT, Rajiv Gandhi Technological University

Diploma - Computer Engineering

Technical Examination Board
Vishvajit Bakarola