Vivek Bhardwaj

• Responsible for Physical Design and CAD Program management
• Key aspects are planning, risk management and exec reporting of multiple projects simultaneously.
• Leveraged project management processes and tools to define and execute projects.
• Interacted with customers and clients to identify business needs and requirements.
• Have successfully taped out more than 10 programs thus far
• Have Introduced new processes and guidelines for operational and engineering efficiency.
• Set KPI's for vendors and internal teams .

• Managed CAD teams and FPGA validation teams in separate roles
• Started as individual Lead and worked on building teams
• Successfully incubated the FPGA flow and validation local team
• Engineering flows developed for Hierarchical implementation of FPGA SoC.
• Executed 4 SOC projects for CAD as manager/lead
• Contributed to effective process and release innovations in CAD development process.
• Engineering ML solutions and innovative validation strategies proposed to ensure optimal quality and drive bug reduction efforts.

• Worked as Cadence onsite customer product engineer.
• Responsible for new technology rollout and RnD features.
• Closed more than 10 SOC's projects for PPA and convergence.
• Accomplished many design and business wins for Cadence.

• Held roles of software engineer, software Engineering Manager and functional product engineer.
• Successfully Started the hierarchical software engineering team
• Held product management portfolio of all hierarchical flow technologies of Cadence and customer focused RnD
• Filed multiple patents and created product flows/trainings
• Recognized as expert in ASIC SoC hierarchical flow enablement

• Co-developed the characterization tool for generating EDA models .Designed graphical interfaces and job control systems.

Solved Y2K problems.