ABDUL HALEEM MOHAMMED
Senior Manager SOC Design Verification At AMD
Hyderabad
Summary
Proven VLSI SOC Design Verification leader [18+ years], skilled at Spec-to-Tapeout execution of complex SOCs working with 80+ sized teams, seek opportunity to build strong teams and technical/business relationships
Overview
18
18
years of professional experience
7
7
years of post-secondary education
2
2
Languages
Work History
Sr. Manager Design Engineering
Advanced Micro Devices
Hyderabad
07.2021 - Current
- Oversaw 15 first-time technical leads to deliver SOC DV for complex SOC based on TSMC4P process [project team size: 50]
- Collaborated with global teams from other BU to help define/strategize their project execution
- Managed team of 20 as their people manager
- Hired right talent at different experience levels for all SOC DV functions
Manager Design Engineering
Advanced Micro Devices
Hyderabad
07.2016 - 06.2021
- Delivered SOC DV for A0/B0 revisions of RYZEN 6000 mobile client APU [team size: 80+]
- Managed and mentored 50+ engineers across multiple SOC DV functional teams during this period
- Coordinated with teams across different geographies to deliver projects with quality and in timely manner
Section Manager Design Engineering
Advanced Micro Devices
Hyderabad
10.2015 - 06.2016
- Transitioned to technical management and managed a team of 16+ engineers for CPU data-path verification
- Owned SOC DV project alignments, planning, execution, tracking and status reporting
- Resolved SOC cross-functional dependencies/issues risking project schedule
- Resolved some of the pressing technical problems working hands-on
Member Technical Staff
Advanced Micro Devices
Hyderabad
06.2012 - 10.2015
- Created a plan and coordinated with extended global team to bring up GPU-based sanity test on 14nm APU based off brand-new architecture
- Owned SOC-level verification of address translation subsystem in HSA (Heterogeneous System Architecture): multiple system-level features [CPU-GPU shared virtual memory, address translation modes; created test plan and coded test bench/tests]
- Contributed to verification of other CPU-GPU features at chip-level: cache coherency, sharing x86 page tables, different memory types, producer-consumer scenarios
- Owned verification at subsystem and full-chip level, worked firsthand on SOC-level debug and TB/infrastructure bring-up
- Mentored junior members on the team
Senior Design Engineer
Texas Instruments
Bangalore
12.2011 - 05.2012
- Owned chip-level verification of automotive peripherals [DCAN, SCI, PWM, PMM] for ARM Cortex-R5 based microcontroller to be used in infotainment and automotive security
- Developed proprietary flow for functional (BIST) and non-functional (NON-BIST) test pattern generation
Design Engineer - to - Team Lead
Redpine Signals Inc
Hyderabad
07.2005 - 12.2011
- Drove chip-level verification of IEEE 802.11a/b/g/n/ac compliant WLAN solutions
- Delivered WLAN subsystem design/collateral and integrated same to customer SOC
- Mentored team of 10+ engineers for development of complete verification environment
- Participated in design and architecture of Access Point Medium Access Control (MAC) layer
- Prototyped/synthesized design for Xilinx Virtex 4/5 FPGAs and validated the same on a proprietary board
- Developed WLAN driver/host model for different interfaces and built AP/STA model
- Modeled WLAN baseband OFDM TX in Matlab
Education
Postgraduate Diploma in Management - Strategic/Financial Management And Marketing
IMT Centre For Distance Learning
Hyderabad, TG 07.2014 - 01.2016
Bachelor of Engineering (B.E) - Electronics And Communication Engineering
Osmania University
Hyderabad, TG 08.2001 - 04.2005
High School - Mathematics, Physics And Chemistry
Narayana Junior College
Hyderabad, TG 06.1999 - 05.2001
Skills
Building/leading 80 size teams for SOC DV
Project requirements planning and execution
Communication and Teamwork
Processor-based verification, C-Verilog/SV/UVM testbenches
Simulation Vs Emulation/FGPA
Timeline
Sr. Manager Design Engineering
Advanced Micro Devices
07.2021 - Current
Manager Design Engineering
Advanced Micro Devices
07.2016 - 06.2021
Section Manager Design Engineering
Advanced Micro Devices
10.2015 - 06.2016
Postgraduate Diploma in Management - Strategic/Financial Management And Marketing
IMT Centre For Distance Learning
07.2014 - 01.2016
Member Technical Staff
Advanced Micro Devices
06.2012 - 10.2015
Senior Design Engineer
Texas Instruments
12.2011 - 05.2012
Design Engineer - to - Team Lead
Redpine Signals Inc
07.2005 - 12.2011
Bachelor of Engineering (B.E) - Electronics And Communication Engineering
Osmania University
08.2001 - 04.2005
High School - Mathematics, Physics And Chemistry
Narayana Junior College
06.1999 - 05.2001