Reading Articles on Linked in Regarding Rail industry
Hi, I’m
Abhishek Nandaiahgari Nagdhar
Rail Signalling Designing & Verification Engineer
Hyderabad
Summary
A Professional Railway Signalling Design and Verification Engineer having 4+ years of experience in Indian railways with good understanding of Signalling Principles, Interlocking & Interface concepts, Standards and Practices.
Overview
4
years of professional experience
6
years of post-secondary education
Work History
Alstom Transport India Pvt.Ltd, Hyderabad
Verification & Validation Engineer
2022.11 - Current (1 year & 10 months)
Job overview
- Responsible for Verfication and Validation activities for TMS System (ICONIS) - both functional and non-functional activites in EDFC (Eastern Dedicated Freight Corridor) project.
- Identification and Reporting of Bugs in Dev-ops Platform and co-ordinating with Data prep and HMI teams for analyisng.
- Responsible for Creating and reviewing Verification & Validation Documents.
- Defining test cases and test descriptions for various business requirements.
- Verification and Validation of L0 & L1 functionalites.
- Installed Project Builds at Project site for EDFC.
- Co-ordinating with Site Engineers for analysing real time issues.
Medha Servo Drives Pvt.Ltd, Hyderabad
Signalling Design Engineer
2019.06 - 2022.10 (3 years & 4 months)
Job overview
- Design and Verification of Interlocking (IXL) Circuits for Different zonal Practices of Indian Railways.
- Designing of Table of Control (TOC) / Route control Chart (RCC)/ Control Table.
- Preparation of Input Output - Hardware IO calculation and IO Allocation for MEI633.
- Handling Signalling Product (Medha Electronic Interlocking unit - MEI633), an indigenously manufacturer of Electronic Interlocking in India.
- Designing & Verification of Interface (Wayside) circuits for different Zonal practices of Indian railways.
- Designing & verification of Electronic Interlocking Application Logic in Boolean format.
- Good knowledge in Train detecting devices
- Providing inputs for Automation of Interlocking & Interface Circuit Tools.
- Communicating with Railway officials for required inputs & Alteration of Interlocking & Interface circuits.
- Provided Signalling Domain and YDC Software Tools Training to New associates.
- Worked as Jr.Engineer in YDC Signalling department in R&D Centre Medha Servo Drives Pvt. Ltd.
- Knowledge on Cable Core Design.
- Knowledge on Track Bonding Plan.
- Knowledge on ERTMS and ETCS.
- Design & Mapping of IO's for HMI - VDU (Visual Display Unit) , FSP (Feild Simulation Panel).
- Providing Support in FAT/SAT and Commisioning of Stations.
Education
Sidhartha Institute of Engineering & Technology , Hyderabad
Bachelor of Science from Electronics And Communication Engineering
2020.07 - Current (4 years & 2 months)
Govt.Polytechnic Masabtank , Hyderabad
Diploma from Electronics And Communication Engineering
2016.06 - 2019.04 (2 years & 10 months)
PNM High School , Hyderabad
SSC (secondary School Certificate)
2001.04
Skills
IXL Design & Verification
undefinedInterests
Timeline
Verification & Validation Engineer
Alstom Transport India Pvt.Ltd
2022.11 - Current (1 year & 10 months)
Sidhartha Institute of Engineering & Technology
Bachelor of Science from Electronics And Communication Engineering
2020.07 - Current (4 years & 2 months)
Signalling Design Engineer
Medha Servo Drives Pvt.Ltd
2019.06 - 2022.10 (3 years & 4 months)
Govt.Polytechnic Masabtank
Diploma from Electronics And Communication Engineering
2016.06 - 2019.04 (2 years & 10 months)
PNM High School
SSC (secondary School Certificate)
2001.04
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