Summary
Overview
Work History
Education
Skills
Projects
Training
Awards
Hobbies and Interests
Disclaimer
Timeline
Generic
Bharat Odedara

Bharat Odedara

Hyderabad,telangana

Summary

Seasoned professional with 11 years of experience in embedded software development using C/C++, expertise in Linux and Windows platforms. Proven track record of leading high-performing teams and mentoring junior developers, utilizing Agile methodologies, cloud technologies, and scalable system design. Extensive background in the EDA industry, specifically in EDA tool development for FPGA. Proficient in Xilinx SDK, Vitis, Vivado, Microsemi SoftConsole, and Libero tools. Excellent knowledge of FPGA and VLSI validation tool flows. Hands-on experience in Linux device driver and Linux kernel source code. Skilled in boot loaders, BSP, board bring-up, and bootflows. Well-versed in firmware development with Linux. Experienced in VC++, Qt applications using Visual Studio and Qt Creator. Proficient in GNU C++, GMP, MPIR, POCO, BOOST, and STL library API functions. Familiarity with Vim editor, Qt Creator, and Eclipse for Linux application development. Knowledgeable in Linux Shell Scripting, TCL scripting, Python, and PyQt. Experienced with databases such as MySQL and MongoDB. Proficient in using version control tools like Git, BitBucket, Clearcase, SVN, and Microsoft Visual Source Safe. Experienced in the complete life cycle of design, development, debugging/testing, documentation, and maintenance of embedded software projects. Strong understanding of data structures and algorithms.

Overview

11
11
years of professional experience

Work History

Senior Software Engineer

Microchip India Pvt Ltd
03.2017 - Current

Libero Configurators

Libero is a EDA tool to create electronic design.It used for creation of complex FPGA based design. It will simulate,synthesis,place and route FPGA based design.

Worked on below RTG4, PolarFire FPGA Configurators.

Roles and Responsibility:

  • Worked on Actgeno RAM netlist generation module, Worked on RAM Configurators
  • Worked on DDR, DDR3, DDR4, LPDDR3, LPDDR4 Configurators, DDRPHY and IO Configurators
  • Worked on Ram initialization module (UIC project)
  • Worked on Memory Map Generator tool
  • Worked on Device and Memory Initialization tool
  • Worked on SNVM, uPROM Configurator
  • Worked on System Services Configurator
  • Worked on CCC Configurator
  • Worked on CCC (Clock conditioning circuitry), PLL (SSM Support), DLL, TxPLL
  • Worked on MSS Configurator
  • Worked on Design Creation using various FPGA tools (Quartus, Vivado, Libero)
  • Worked on BfmToVec Compiler

Software Engineer

Xilinx India(Collabera)
02.2016 - 03.2017

FSBL

Fsbl is first stage boot loader on zynq based SOC of Xilinx. Before running any application on board it will boot first. It has 4 stages described as below.

1. Initialization: It will initialize processor, peripheral like i2c, mio, ddr, system drivers.

2. Boot device initialization and Header Validation: It will initialize primary boot device

Like qspi, nand, SD etc. and validate the header.

3. Partition copy, Validation: It will perform Partition header validation, Partition

Copy, Partition Validation.

4. Handoff: It will perform Post Configuration and Handoff to CPU’s.

Roles and Responsibility:

  • Working on PR related to FSBL, Ex
  • Early handoff, Wrapper for psu_init, X1, X2 bus width support for Qspi
  • Working on CR related to FSBL, Ex
  • R5 Fsbl vector overwritten by R5 Application, Secure boot of Fsbl failing due to big endian code activation in bsp
  • Worked on MISRA-C Compliant for FSBL
  • Customized bsp according to FSBL usages
  • Worked on QSPI, NAND, Linux device driver
  • Testing fsbl performance on various boards like zcu102, zc1751

PMU FIRMWARE

PMU FIRMWARE is a platform management unit firmware for Xilinx SOC ,which will run on microblaze cpu through PMU RAM,It will handle and control the interrupt between all the processors present in zynq and zynqmp SOC,It will use IPIPSU driver for this purpose.

Roles and Responsibility

● Working on PR related to PMUFW.

● Working on CR related to PMUFW.

● Created the versionless automated building of PMUFW through git ,Without using any tools.

Ubpf Vm

Ubpf is open source project.This project is aims to create an Apache licensed Library for executing eBPF programs.The primary implementation of eBPF lives in linux kernel.We used this open source project to load bpf plugins in microblaze based board.

Roles and Responsibility:

● Cloned the source code from Gibhub and started working on it to create customized plugin loader for microblaze.

● Resolved .text, .data, .rel.text, .rodata.str1 section.

● Implemented stack for multiple function calls.

● Increased performance, Reduce the size of code.

● Released successfully this new customized BPF based VM.

Software Engineer

Intense Technologies Limited
06.2014 - 02.2016

1VU,Uniserve

TRAI regulations mandate that a subscriber should not have more than a stipulated number of connections within a specific telecom circle. Customer information on the other hand is captured by multiple systems operating in silos and manual data entry resulting in possible inconsistencies in information. Online and offline De-duplication of records to establish customer identity has the following challenges: Missing, conflicting, corrupted information and data entry errors to match customer information Ever growing customer subscriptions complicating the de-duplication process Businesses need to check with lists of blacklisted customers and National Do Not Call (NDNC) prior to onboarding , Parameters like name, addresses etc being captured differently at each customer interaction, 1VU tool does above features.

Lab Assistant

Vector India Pvt Ltd.
12.2013 - 06.2014

Diagnostic code for 8051 Development Board.

● In this project developed the testing code for devices like led, switches, uart, lcd, 7-seg display,i2c,spi,dc motor, keypad.

Preprocessor using C language for GCC compiler.

● Implemented some features of preprocessor like macro replacement, header file inclusion, comment removal using C language programming.

Education

MTECH -

BITS Pilani
Rajasthan
01.2025

BE(ECE) -

SSEC
Bhavnagar
06-2013

H.S.C.(12th) -

Rajshakha Higher Secondary School
Porbandar
05-2009

S.S.C.(10th) -

Navyug Vidhalaya
Porbandar
05-2007

Skills

  • Visual Studio, Qt Creator, Eclipse, Keil, Xilinx SDK
  • LINUX, Windows XP, Windows 7, Windows 10
  • C, C, Embedded C, ARM, Assembly Language
  • Verilog, Linux shell scripting, TCL, Python
  • Team Leadership, Cross-functional Collaboration
  • Project Management, Junior Developer Training
  • Code Reviews, Professional Development

Projects

Work

Libero Configurators, FSBL, PMU FIRMWARE, Ubpf Vm, 1VU, Uniserve

Academics

Train ticket Booking system, Raspberry Pi Based computer vision projects like Face detection, Vehicle Number Plate Detection, IOT based Home Automation and Agriculture irrigation system.

Training

  • Vector India Pvt. Ltd, Hyderabad, 10/01/13, 04/01/14
  • BSNL, Porbandar, Gujarat

Awards

Honor date: Sep 2017 honor issuer: Microsemi Corporation

"Above and Beyond Award" was awarded in recognition and appreciation for designing(migrate from collapsible frames to Qt Tables) the Fabric RAMs page to be inline with other pages for Polarfire EAP-SP1 release, ahead of schedule. For Polarfire EAP4-SP2,redesigned back-end code for RAMs using design patterns that helps in validation of all memories in UIC flow.

Hobbies and Interests

  • Machine Learning,Working with Linux internals
  • Playing Chess, Listening Music

Disclaimer

Thereby, I declare that the above mentioned details are true and best of my knowledge.

Timeline

Senior Software Engineer

Microchip India Pvt Ltd
03.2017 - Current

Software Engineer

Xilinx India(Collabera)
02.2016 - 03.2017

Software Engineer

Intense Technologies Limited
06.2014 - 02.2016

Lab Assistant

Vector India Pvt Ltd.
12.2013 - 06.2014

MTECH -

BITS Pilani

BE(ECE) -

SSEC

H.S.C.(12th) -

Rajshakha Higher Secondary School

S.S.C.(10th) -

Navyug Vidhalaya
Bharat Odedara