Summary
Work History
Education
Skills
Certification
Accomplishments
Languages
Visitsparticipations
Hobbies and Interests
Personal Information
Timeline
Hi, I’m

CHINNASALIPELA NAGA NIRANJAN REDDY

Jr. EW(Electronic Warfare) Test Engineer
Hyderabad,TG
CHINNASALIPELA NAGA NIRANJAN REDDY

Summary

Seeking an opportunity to be self-reliant and embark on a fulfilling professional journey, acquiring valuable skills and knowledge from a reputable organization. Aspiring to contribute to a quality work environment that will serve as a solid foundation for career growth.

Work History

Unistring Tech Solutions(UTS) Pvt Ltd.

Jr. EW(Electronic Warfare) Test Engineer
03.2024 - Current

Job overview

  • Field Programmable Gate Array(FPGA) Programming using Verilog HDL, Synthesize, implementation and Bit file(.bit)generation.
  • Conduct RFDD (Radio Frequency Drone Detection) testing to determine the angle of arrival (AOA) of drones
  • Perform ESS (Environmental Stress Screening) and QT (Qualification Test) to ensure device functionality
  • Document device behavior before and after conducting ESS & QT
  • Create comprehensive Test Data Reports for all conducted tests
  • Basic Antenna Testing using VNA
  • RF cable testing using VNA

National Atmospheric Research Laboratory (NARL)

Intern
12.2023 - 03.2024

Job overview

  • A Project was undertaken to generate timing pulses for Transceiver (TR) modules using a Virtex 6 FPGA
  • Verilog HDL was employed as the hardware description language for designing the pulse generation logic
  • The designed logic was implemented on a Virtex 6 FPGA to generate precise timing pulses
  • A digital oscilloscope was utilized to verify the accuracy and timing of the generated pulses
  • The generated pulses successfully synchronized the transmit and receive operations of the TR modules
  • Through this project, skills in FPGA programming and hardware debugging were significantly enhanced

Indian Institute of Technology(IIT) Mandi

VLSI Intern
06.2023 - 07.2023

Job overview

  • An inverter schematic circuit was designed using 180nm technology for high-speed logic gates
  • The designed circuit was optimized to operate at a clock frequency of 1 GHz
  • The Symica tool was used to analyze and study various delays associated with the inverter circuit
  • A visit to a state-of-the-art Fab Lab, valued at ₹300 crores, which gave us insights of semiconductor design and fabrication processes

Education

G. Pulla Reddy Engineering College(Autonomous)
Kurnool

B. Tech from ECE
01.2024

University Overview

GPA: 8.92/10

Rao's Jr college
Nandyal

Intermediate
01.2020

University Overview

GPA: 9.88/10

Sri Santhinikethan EM High School
Nandyal

SSC
01.2018

University Overview

GPA: 10/10

Skills

  • Verilog HDL
  • Python Programming
  • HTML5
  • Basic C Programming
  • Latex Overleaf

Certification

  • NPTEL Elite Certification in 'Hardware Modeling Using Verilog', Prof. Indraneel Sengupta, IIT Kharagpur, 07/01/23 - 09/30/23
  • NPTEL Elite Certification in 'Microelectronics: Devices to Circuits', Prof. Sudeb Dasgupta, IIT Roorkee, 07/01/23 - 10/31/23
  • Certified in 'Introduction to Python Programming', MICROSOFT
  • Certified in 'Python Programming', IIT Bombay
  • Certified in 'Basic HTML', EDYST learning platform

Accomplishments

  • Successfully pursued and earned an Honors Degree in Electronics and Communication Engineering, demonstrating exceptional academic performance and a keen interest in cutting-edge technologies.

Languages

English
Telugu
Hindi

Visitsparticipations

  • A visit to Fabrication Laboratory of IIT Mandi, Himachal Pradesh.
  • An Industrial visit to BSNL office, Kurnool.
  • Attended a 5 day National level Workshop on 'Silicon to System Design', conducted by IEEE COMMUNICATION SOCIETY AND INFORMATION THEORY SOCIETY OF GPREC.
  • Actively participated as a volunteer(Panel Exhibitor) in 'World Space Week' program conducted by Indian Space Research Organisation(ISRO) at G. Pulla Reddy Engineering College, Kurnool, Andhra Pradesh.

Hobbies and Interests

  • Farming in vacation
  • Watching and playing Cricket
  • Listening to Epical stories
  • Listening to Music
  • Continuous Skill upgrading

Personal Information

  • Father's Name: CS Naga Pulla Reddy
  • Mother's Name: CS Sivaleela
  • Date of Birth: 04/29/02

Timeline

Jr. EW(Electronic Warfare) Test Engineer

Unistring Tech Solutions(UTS) Pvt Ltd.
03.2024 - Current

Intern

National Atmospheric Research Laboratory (NARL)
12.2023 - 03.2024

VLSI Intern

Indian Institute of Technology(IIT) Mandi
06.2023 - 07.2023

G. Pulla Reddy Engineering College(Autonomous)

B. Tech from ECE

Rao's Jr college

Intermediate

Sri Santhinikethan EM High School

SSC
CHINNASALIPELA NAGA NIRANJAN REDDYJr. EW(Electronic Warfare) Test Engineer