AIYUSH AGGARWAL

• Experienced professional in Electronic Design Automation (EDA) software, proficient in resolving intricate design and verification challenges within system development. Demonstrated expertise in leading projects, conducting comprehensive testing, and providing exceptional customer support. Specialized in SOC and IP Design, with a focus on establishing connections between multiple IPs and developing industry-standard designs such as CAN bus, SPI Bus, and Ethernet. Skilled in integrating RISC-V architecture into EDA tools to enhance functionality and performance. Actively involved in standards development and industry collaboration, including participation in the Accellera IP-XACT and CDC working group.
• Key Responsibilities and Achievements:
• Regression Testing and Scenario Development: Spearheaded regression testing initiatives, meticulously verifying software performance and ensuring robustness. Crafted and executed complex test scenarios to evaluate software capabilities comprehensively.
• Customer Support and Issue Resolution: Played a pivotal role in resolving customer tickets, adeptly diagnosing issues and providing effective solutions. Conducted customer meetings to understand requirements and address concerns promptly, enhancing overall satisfaction.
• Project Leadership: Independently led projects, coordinating tasks, and ensuring timely delivery of high-quality solutions. Successfully managed multiple projects concurrently, maintaining stringent adherence to deadlines and project objectives.
• SOC Design: Directed efforts in SOC design, focusing on establishing connections among diverse IPs and validating their functionality. Implemented rigorous verification processes to guarantee seamless integration and optimal performance.
• IP Design: Led the development of large-scale industry-centric designs, including CAN bus, SPI Bus, and Ethernet. Demonstrated proficiency in conceptualizing, designing, and validating IP designs to meet stringent industry standards.
• Standards Involvement: Contributed to the development and implementation of industry standards such as IPXACT Velocity and SystemRDL. Actively participated in the Accellera IP-XACT and CDC working group, collaborating with industry peers to advance standards and best practices.
• Technical Presentations:
• Presented a poster on Portable Stimulus Specification (PSS) at DVCon India.
• Presented Accellera CDC-RDC Training at DVCon Taiwan
• Attended DVCon India on behalf of Agnisys as Exhibitor

Additional Contributions:

• Authored articles and research papers, sharing insights and best practices within the EDA community.
• Actively participated in knowledge-sharing initiatives, fostering a culture of continuous learning and innovation within the organization.
• Technical Skills:
• Proficient in Electronic Design Automation (EDA) software.
• Expertise in SOC Assembly and packaging and IP Design, Regression Testing, and Scenario Development.
• Skilled in debugging, issue resolution, and customer support.
• Familiarity with industry-standard protocols such as CAN bus, SPI Bus, Ethernet, and RISC-V architecture.