Anurag Vaddi
Bengaluru
Summary
Experienced Senior Engineer with 3 years in Synthesis and STA at Mediatek Bangalore. Expertise includes block level synthesis, CLP, LEC, ERC and DFT insertion.I have hands-on experience in block-level designs across Wi-Fi, TV, AR, and VR chips Successfully improved QOR and PPA in multiple voltage designs. Focused on learning and contributing to efficiency-enhancing projects.
Overview
5
5
years of professional experience
Work History
Senior Engineer
Mediatek Bangalore pvt ltd
Bangalore
07.2023 - Current
- Executed RTL-to-gate synthesis for advanced-node designs (2nm–12nm) using Cadence Genus and Synopsys Fusion Compiler, delivering high-quality netlists for multiple SOC blocks across AR,VR chips, Wi-Fi ,and had experience in DDR subsystem and with instance counts up to 3.3M.
- Optimized clocking, timing constraints, and design architecture across complex SoC blocks—with macro count of 270 design , multiple asynchronous clock domains, and frequencies up to 1.2 GHz, ensuring clean STA handoff and PPA-optimized synthesis results.
- Developed and refined synthesis flows for large-scale designs, including constraint development (SDC), multi-corner/multi-mode (MCMM) optimization, logic structuring, DFT readiness, and physical-friendly netlist generation in collaboration with PD and Design teams.
- Achieved timing closure by implementing ECOs for setup using Synopsys PrimeTime(PT) reducing iteration by enhancing the quality of ECOs
- Acted as block coordinator for 6 blocks, ensuring adherence to PPA and schedule
Intern
Mediatek Bangalore pvt ltd
Bangalore
07.2022 - 06.2023
- Completed training in Synthesis, STA, physical design flow and worked on synthesis project using Fusion compiler. Understood flow in Mediatek
Analyst
A4 Capgemini
Hyderabad
03.2021 - 08.2021
- Had training in Java Enterprise Edition and in Guidewire software.
- I worked on configuration in policy center.
- Guidewire is used by insurance companies
Education
M.Tech. - Electrical Engineering
National Institute of Technology
Rourkela07-2023
B.E. - Electronics and Communication Engineering
Chaitanya Bharathi Institute Of Technology
Hyderabad01.2020
Skills
- Verilog HDL
- Fusion Compiler
- Genus
- Innovus
- PrimeTime
- Conformal
- TimeVision
Projects
Air pollution monitoring system using Iot
Air pollutant particles for a particular area is determined by using MQ135 and DHT11
sensors and displayed on the screen using Raspberry Pi
Accomplishments
10/18, Winner in Battlefield event, organised by Robotics club of CBIT Hyderabad
Hobbies and Interests
Travelling, Movies, Badminton, Chess, Music
Timeline
Senior Engineer
Mediatek Bangalore pvt ltd
07.2023 - Current
Intern
Mediatek Bangalore pvt ltd
07.2022 - 06.2023
Analyst
A4 Capgemini
03.2021 - 08.2021
M.Tech. - Electrical Engineering
National Institute of Technology
B.E. - Electronics and Communication Engineering
Chaitanya Bharathi Institute Of Technology