Spyglass (LINT, CDC and DFT DRC)
Accomplished Staff Engineer at Analog Devices with a proven track record in managing complex projects to successful completion. Expert in Microarchitecture and RTL Development. Skilled in digital verification and FPGA design. Works at fast pace to meet tight deadlines. Enthusiastic team player ready to contribute to company success.
Micro-Architecture
RTL Development - Verilog and System Verilog
Digital Verification
LINT, CDC, Constraints Development, Synthesis, STA, LEC
Gate Level Simulations
UPF Development
Spyglass (LINT, CDC and DFT DRC)
Cadence Simulator Suite
Design Compiler
Prime Time
Meridian Lint/ CDC
Conformal LEC
Xilinx VIVADO
Xilinx ISE
Verdi
Conformal Low Power