Summary
Overview
Work History
Education
Skills
Accomplishments
Interests
Timeline
SeniorSoftwareEngineer

Dikshant Pandey

Senior Software Engineer
Gurgaon,HR

Summary

Accomplished Senior Software Engineer with expertise in C++ and network protocols, notably at Amantya Technologies. Proven track record in optimizing signaling flows and enhancing system performance. Strong analytical skills complemented by effective collaboration with cross-functional teams, driving successful integration and debugging efforts in complex 5G environments.

Overview

6
6
years of professional experience

Work History

Senior Software Engineer

Amantya Technologies
12.2024 - Current
  • Developed and maintained System Adapter (SA) modules in C++, integrating TTCN-3 test suites with 4G/5G protocol stacks, and simulation environments.
  • Debugged and optimized SIP, SDP, RTP, and RTCP signaling flows, resolving issues such as unexpected BYE, missing 200 OK, audio path loss, and RTP header mismatches.
  • Added functionality and resolved issues in IPSec-based transport, including source-port fixes, encryption/decryption path validation, and drop analysis in secure tunnels.
  • Contributed to the development and debugging of RTPG server flows, validating RTP generation logic, packet scheduling, and ensuring RTP/RTCP reachability to UE.
  • Performed analysis and implementation changes related to single skew scenarios, fixing timestamp drift, skew handling logic, and improving time-sync behavior across components.
  • Supported integration and debugging for NTN (Non-Terrestrial Networks), including signal flow validation, message mapping, latency impact analysis, and adapting SA logic for NTN use cases.
  • Created detailed RCA documents, MoMs, debugging summaries, and collaborated with OEMs and internal teams to communicate fixes and test validations.

Senior Engineer

Hughes Systique Corporation
09.2022 - 11.2024
  • TM500-based architectural development for 5G SA mode, particularly in RRC, PDCP, and RLC.
  • RRC Rel17 license feature based on SETP methodology.
  • PDCP and MAC error handling while removing asserts and unit testing.
  • Implemented the Time-to-Trigger feature with TM500 in RRC.
  • Critical observations, bug fixing, and majorly P1, P2, and customer blocker issues.
  • Component Testing and Unit Testing with Visual Studio 2019.

Engineer

Hughes Systique Corporation
09.2022 - 11.2024
  • Implemented UE Assistance Information (UAI) in RRC to handle overheating scenarios with maximum MIMO layers.
  • Worked extensively on customer-reported defects related to UAI, including support for multiple UAI iterations based on preferred UE states.
  • Addressed critical customer issues involving payload mismatches in UCP control data caused by incorrect TBSize values.
  • Worked on RRC security key functionalities such as KAMF, KgNB, KRRCint, and KRRCenc across Inter-gNB handover, Inter-RAT handover, NR-DC, and NSA scenarios.
  • Conducted root cause analysis on various component failures.

Software Engineer

Altran Technologies
09.2019 - 09.2022
  • Good experience in New Product Development, Post Development Support, Integration and Interoperability Testing and Porting.
  • Developed and worked on features in 5G stack such as MultiCell, MIMO, System Information, Multi UEs-Multi DUs case, Measurement Reporting, Test-tool Development etc.
  • Documents and demonstrates solutions by developing documentation, flowcharts, layouts, diagrams, charts, code comments and clear code.
  • 5G gNB Customers' Issue analysis and bug fixing.
  • Worked on Valgrind and Coverity tools.
  • Experience in C-Unit testing and development of Test-tool enhancement.

Education

Master of Science - Embedded System Designing

BITS Pilani
Pilani, India
04.2001 -

P.G. Diploma - Embedded System Designing

CDAC, Pune
Pune, India
04.2001 -

Bachelor of Technology - Electronics And Communication Engineering

Rajasthan Institute of Engineering And Technology
Jaipur, India
04.2001 -

Skills

C/C

Accomplishments

  • Recognition for excellency in Q1 at Amantya Technologies 2025.
  • Instant Team Award for excellent contribution in PI 24.2 in HSC
  • Instant Individual Award for PI 23.4 in HSC.
  • Instant Team Award for excellent contribution in PI 23.2 in HSC.
  • Instant Individual Award for PI 22.3 in HSC.
  • WOW - Team Excellence Award in Altran Technologies - 2021.
  • Campus Ambassador of Techkriti Jaipur conducted by IIT Kanpur, 03/01/16.
  • Best paper Presentation on ETEMSD 2016 at the International Conference held in RIET, Jaipur, 02/01/16.

Interests

Badminton

Trekking

Bike Riding

Narrative Gaming

Timeline

Senior Software Engineer

Amantya Technologies
12.2024 - Current

Senior Engineer

Hughes Systique Corporation
09.2022 - 11.2024

Engineer

Hughes Systique Corporation
09.2022 - 11.2024

Software Engineer

Altran Technologies
09.2019 - 09.2022

Master of Science - Embedded System Designing

BITS Pilani
04.2001 -

P.G. Diploma - Embedded System Designing

CDAC, Pune
04.2001 -

Bachelor of Technology - Electronics And Communication Engineering

Rajasthan Institute of Engineering And Technology
04.2001 -
Dikshant PandeySenior Software Engineer