Hrishikesh S Nair
Palakkad
Overview
3
3
years of professional experience
4
4
Languages
Work History
Associate Software Engineer
KPIT
07.2024 - Current
- Trained within a 26-member team for Stellantis on system validation of various VFs.
- Validated Stellantis Vehicle Functions using CAN, HiL, and DBC editors.
Summer Internship
Maven Silicon
05.2023 - 07.2023
- Designed and verified an AHB to APB bridge using ModelSim Intel FPGA Starter Ed.
- Achieved 30% reduced bus comm. latency through optimisation techniques.
Education
B.Tech - ECE with specialisation in Embedded Systems
VIT, Amaravati
09.2024
Senior Secondary +2 - CBSE
Kendriya Vidyalaya, Ottapalam
03.2019
Secondary School 10th - CBSE
Kendriya Vidyalaya, Ottapalam
04.2017
Skills
- Technical skills:
- C/C (intermediate)
- Embedded C (intermediate)
- HiL Testing
- Automation Frameworks
- ARM Architecture
- MATLAB/Simulink
- Personal skills:
- Effective Communication Skills
- Leadership
- Resilience
- Time Planning
- Teamwork
Affiliations
- IEEE (Secretary, VIT-AP)
- IEEE MTT-S
- IETE
Interests
Reading, Chess, Outdoor Sports
Timeline
Associate Software Engineer
KPIT
07.2024 - Current
Summer Internship
Maven Silicon
05.2023 - 07.2023
Senior Secondary +2 - CBSE
Kendriya Vidyalaya, Ottapalam
Secondary School 10th - CBSE
Kendriya Vidyalaya, Ottapalam
B.Tech - ECE with specialisation in Embedded Systems
VIT, Amaravati
PUBLICATIONS
- An Intelligent Raspberry-Pi-Based Parking Slot Identification System – EAI
- Link: https://rb.gy/q8ly
- NOV 2023
Declaration
I hereby declare that the above particulars of facts and information stated are true, correct and complete to the best of my belief & knowledge.
POSITION OF RESPONSIBILITY
- Secretary of IEEE Student Branch VIT-AP – (STB11464)
- SEP 2022 - SEP 2023
- Led 5 diverse club events showcasing exceptional cross-functional team leadership.
- Orchestrated 3 sub-teams each containing 10 team members for the same.