Summary
Overview
Work History
Education
Skills
Projects
Accomplishments
Hobbies and Interests
Timeline
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Kavita Kumari

Kavita Kumari

New Delhi

Summary

Experienced Analog Design & Verification Engineer skilled in validating and designing high-performance analog/mixed-signal circuits using tools like Cadence and Spectre. Proficient in schematic to corner analysis, and mixed-signal verification with a focus on reliability and silicon accuracy..

Overview

1
1
year of professional experience

Work History

Analog Verification Engineer

3rdiTech.lnc
10.2024 - Current

ASIC Design Intern

3rdiTech.lnc
01.2024 - 10.2024

Education

M.Tech - VLSI Design

Punjab Engineering College
Chandigarh
08-2024

B.Tech - ECE

Dr.B.R. Ambedkar National Institute of Technology
Jalandhar, Punjab
06.2017

Skills

  • Analog IC Design
  • Analog Circuits
  • Control Systems
  • CMOS VLSI Design
  • MOS Devices
  • Cadence Virtuoso
  • Xilinx ISE

Projects

Characterization & Modeling of CDS-PGA for CMOS image Sensor

Designed and verified  Programmable Gain Amplifier (PGA), for higher dynamic range in CMOS image sensor, using switched capacitor amplifier in 180 nm technology on Cadence Virtuoso ADE  and modeled it in Verilog-A. Further, integrated CDS (Correlated Double sampling) technique to the PGA to remove offset error.

Two Stage CMOS op-amp(7T-OTA) for analog I/O buffer

Designed and verified two stage CMOS Op-Amp for given specifications in 180 nm technology on Cadence Virtuoso ADE.

Did prelay & postlay verifivation of various analog blocks like  Voltage Reference ,Current Reference,  LVDS ,Class-AB Power amplifier, level shifter,7T-OTACDS-PGA by performing AC,DC ,transient and PVT across corner analysis on Cadence Virtuosos ADE to verify parameters like ICMR, loop gain, phase margin,UGB, Slew rate,CMRR,PSRR etc.

Asynchronous FIFO using Verilog -HDL, 10/2023- 12/2024
Designed an asynchronous FIFO memory using memory, write pointer logic, read pointer logic, synchronizer, gray counter etc. Implemented on RTL level using Verilog HDL on Xilinx ISE and verified its functionality.

Accomplishments

  • Secured AIR 538 in GATE(IN) 2022.
  • Awarded by 'GARGI PURUSHKAR' by Balika Shiksha Foundation Rajasthan, for three times for excellent performance in class 12th(RBSE,91.89%), 10th(94.33%,RBSE) & in 8th(93.11%,RBSE).

Hobbies and Interests

  • Trekking
  • Gardening

Timeline

Analog Verification Engineer

3rdiTech.lnc
10.2024 - Current

ASIC Design Intern

3rdiTech.lnc
01.2024 - 10.2024

M.Tech - VLSI Design

Punjab Engineering College

B.Tech - ECE

Dr.B.R. Ambedkar National Institute of Technology
Kavita Kumari