KIRAN KUMAR

Creative and detail-oriented Design Intern considered exceptionally quick learner. Effective team player with strong time management skills to complete projects on time and under budget.

• Digital electronics - HDL: Verilog language
• Verilog language - Xilinx Vivado.
• Digital IC design - Cadence Virtuoso
• Static time Analysis - LT Spice simulator
• Vlsi physical design flow - C language.
• Low power design Techniques
• Clock tree synthesis

• Control system of Automatic Washing Machine in Xilinx Vivado Tool by using Verilog, A 7 state control system of Automatic washing machine has been designed by using Verilog hardware description language in Xilinx Vivado Tool and synthesized it.
• Control system of the 4 way traffic light controller in Finite state machine Approach, A 4 way traffic light controller has been designed in a finite state machine approach and synthesized it in Xilinx vivado tool.
• Low power delay voltage Level shifter based on a Reflected output Wilson current mirror Level shifter in cadence Tool.
• Low power scalable Analog to digital converter at 45nm technology using cadence Tool, This scalable ADC has been implemented at 45nm technology in cadence virtuoso tool in a mixed signal design mode where the controller which is successive approximation register type ADC has been designed by using Verilog language and the netlist has been imported whereas the rest of the components are designed at Transistor level by sizing the transistors at process technology of 45 nm.

• One month online internship on Xilinx SOC design flow by sandeepani (Corel Technologies) bangalore. Short term course on Latest Trends in VLSI organized in NIT Delhi.
• Digital IC design from NPTEL by IIT Madras
• Static time Analysis in Udemy V
• erilog language comprehensive course in Udemy
• VLSI Physical design in Udemy.
• Hardware modelling using Verilog by IIT KGP

• Low Power Scalable Successive Approximation ADC at 45nm.International Journal of Engineering Research in Electronics and Communication Engineering (IJERECE)Oct 9, 2015 International
• Low Power and High-Speed Current Mirror Based Level Shifter in Sub-Threshold First International Conference on Electronics, Communication and Signal Processing (ICECSP 2024)Regime"