Kunal

Motivated M.Tech ECE Student Trained in Design Verification, proficient in Verilog, SystemVerilog, Skilled in creating testbenches, debugging, and ensuring design functionality. Eager to apply technical expertise and analytical skills to contribute to innovative verification solutions in VLSI industry.

• Design and Verification of APB Protocol Interface
  This project involves designing and verifying the APB protocol interface, including master, slave, and interconnect modules. It ensures accurate data transfer and compliance with protocol specifications through SystemVerilog-based testbenches, focusing on low-power, low-complexity peripheral communication in SoC designs.
• Published a Research paper on Topic "Automation in Contactless Switch using Arduino" on ICRACI4-0
  Focusing on designing efficient, touchless control systems for enhanced convenience and safety in automation applications.
• Designed a 16x4 Dual-Port RAM , enabling simultaneous read/write operations on two independent ports for efficient memory access in high-performance digital systems.