Hardworking and passionate job seeker with strong organizational skills eager to secure entry-level SOC Design Intern position. Ready to help team achieve company goals.
Overview
1
1
year of professional experience
2
2
Certifications
Work History
SoC Design Intern
Defence Research And Development Organisation
12.2023 - 04.2024
Implemented Signal Processing Algorithms using Zynq SOC.
Designed Beam Formation in frequency domain using Verilog HDL.
Participated in workshops and presentations related to project to gain knowledge.
Collaborated with senior management to develop, review and finalize design concepts.
Intern
Defence Research And Development Organisation
05.2023 - 07.2023
Learned the basics of Verilog HDL.
Designed second order filter using Verilog HDL.
Education
B.Tech - Electronics And Communication Engineering
Andhra University College of Engineering
Visakhapatnam
04.2001 -
Intermediate - MPC
Fiitjee Junior College
Visakhapatnam, India
04.2001 -
Ramanath Secondary School
Visakhapatnam, India
05.2018
Skills
C
Python
Matlab
Verilog
Object Oriented Programming
HTML
CSS
Data Structures and Algorithms
Certification
VLSI System on Chip Design
Timeline
SoC Design Intern
Defence Research And Development Organisation
12.2023 - 04.2024
VLSI System on Chip Design
06-2023
Intern
Defence Research And Development Organisation
05.2023 - 07.2023
VLSI Design
01-2023
B.Tech - Electronics And Communication Engineering
Andhra University College of Engineering
04.2001 -
Intermediate - MPC
Fiitjee Junior College
04.2001 -
Ramanath Secondary School
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