Manish Kumar Roy
Shillong
Summary
Aspiring VLSI engineer seeking opportunities to gain practical knowledge, enhance skills and contribute value to the organization and the industry.
Overview
1
1
year of professional experience
Work History
Internship
Bosch
Bengaluru
06.2023 - Current
- Denoxtronic Exhaust Gas Treatment System
Trainings
Maven Silicon Institute
11.2023 - 10.2024
- VLSI Design and Verification Training
Education
MTech - Microelectronics
Manipal Institute of Technology
Manipal,Karnataka 09-2024
B.Tech - Electronics And Communication
Government College of Engineering
Tirunelveli, Tamil Nadu09-2020
CBSE - 12th
Kendriya Vidyalaya
Upper Shillong09-2015
CBSE - 10th
Kendriya Vidyalaya
Upper Shillong09-2013
Skills
- Verilog HDL
- Digital Circuit Design
- System Verilog
- UVM Basics
- VLSI Testing and Testability
- VLSI Physical Design
- CAD Tools for VLSI
- Cadence Virtuoso
- Analog circuit design
- ASCET - Embedded Systems design tool
- TPT - Test Software for Embedded Software
- C
Projects
- Design and Analysis of MAC Unit using Verilog
- Design of 1 X 3 Router using Verilog
- Simulation of LEACH and PEGASIS protocols for WSNs.
Accomplishments
- 3 Days Hands on training on "Cadence EDA tool for Chip Design (Analog RF and Digital Flows)"
Languages
- English
- Hindi
- Bengali
- Assamese
Extra / Co Curricular Activities
Cadet In NCC (2012-2015)
SPORTS- Cricket,Badminton
Poetry, Singing, Guitar
Timeline
Trainings
Maven Silicon Institute
11.2023 - 10.2024
Internship
Bosch
06.2023 - Current
MTech - Microelectronics
Manipal Institute of Technology
B.Tech - Electronics And Communication
Government College of Engineering
CBSE - 12th
Kendriya Vidyalaya
CBSE - 10th
Kendriya Vidyalaya
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