Summary
Overview
Work History
Education
Skills
Training
Software
Blood Group
Marital Status
Certification
Timeline
Generic
Pavan Vaddanahal Kenchappa

Pavan Vaddanahal Kenchappa

Lead Engineer, Signalling
Bengaluru

Summary

7+ years of real-world experience in application logic design utilizing ACE programs and detail engineering design using Micro Station CAD are combined with a Bachelor of Engineering (Electronics and Communication) degree. Competent in distribution network analysis, software- and hardware-based testing, drawing preparation, and project document generation. Knowledgeable about every aspect of testing, details, and design. a track record of inspiring and managing project teams to achieve outstanding outcomes in a challenging work environment.

Overview

8
8
years of professional experience
6
6
years of post-secondary education
2
2
Certifications
2
2
Languages

Work History

Lead Engineer, Signalling

Wabtec Corporation
Bengaluru
10.2023 - Current
  • Project: Caltrain project, USA. (Electrologixs XP4 Crossings) Developed the Application Logics for Wireless crossing operations and independent software reviewer and completed the Reduced text validation procedure for the in-service locations & completed the Documentation for final submission.
  • Project: Caltrain project, USA. (Electrologixs XP4 Crossings) Wireless crossing operations and Independent applications logic verifications & Functional testing By Hardware rack test for 2SC(2 speed check) Traditional and Wireless crossing & completed the Documentation for final submission.
  • Project: Caltrain project, USA. (Electrologixs XP4 Crossings) Development on Virtual local control panel design for crossing operation motoring and validating hardware rack testcase.

Senior Engineer, Signalling

Wabtec Corporation
Bengaluru
10.2021 - 09.2023
  • Project: Brightline/Virgin Trains Phase-II, USA. (Electrologixs) Application Logics design and aspect chart operation updates, Functional testing of programs by using SATS software tool as independent verified the Control Point, Intermediate, Electric lock switch & Cut sections/ Repeater locations application data and prepared the documentation as per VTUSA Standards. Completed the Final Check Quality process as independent documents & software verifications. Supported for the all the Cutover commissions for Phase I, Phase I B & Phase II.
  • Project: Caltrain project, USA. (Electrologixs XP4 Crossings) Developed the Application Logics for Wireless crossing operations and independent software reviewer and completed the Reduced text validation procedure for the in-service locations & completed the Documentation for final submission.
  • Project: Brightline/Virgin Trains Phase-II, USA. (Electrologixs XP4 Crossings) Developed Application Logics for Wireless crossing operations and independent software reviewer.
  • Project: CSX Project USA. (Electrologixs) Independent applications logic verifications using SATS Simulation tool for Control point locations.
  • Project: Brightline/Virgin Trains Phase-I and Phase- I B project, USA. (Electrologixs) Application Logics for TCR and aspect chart operation updates, Functional testing of programs by using SATS software tool as independent verified the Control Point, Intermediate, Electric lock switch & Cut sections/Repeater locations application data and prepared the documentation as per VTUSA Standards, also completed the Reduced text validation procedure for the in service locations & completed the Documentation for final submission. Completed the Final Check Quality process as independent documents & software verifications.
  • Project: RTD North Metro project, Denver USA. (Electrologixs XP4 Crossings) Wireless Application Logics Design Vital & Non-Vital logic updates and completed the RTVP jobs. XP-4 ELX lab set-up in ITC Green Office for XP-4 crossing control testing/simulation
  • Project: Brightline/Virgin Trains Phase-II, USA. (Electrologixs XP4 Crossings) Wireless crossing operations and independent applications logic verifications & Functional simulation testing By SATS Tools for Wireless crossing & completed the Documentation for final submission.
  • Project: Caltrain project, USA. (Electrologixs XP4 Crossings) Wireless crossing operations and Independent applications logic verifications & Functional testing By Hardware rack test for 2SC(2 speed check) Traditional and Wireless crossing & completed the Documentation for final submission.

Engineer, Signalling

Wabtec Corporation
Bengaluru
04.2019 - 09.2021
  • Project: Brightline/Virgin Trains Phase-I project, USA. (Electrologixs) Application Logics for TCR and aspect chart operation updates, Functional testing of programs by using SATS software tool as independent verified the Control Point, Intermediate, Electric lock switch & Cut sections/ Repeater locations application data and prepared the documentation as per VTUSA Standards. Completed the Final Check Quality process as independent documents & software verifications.
  • Project: Caltrain project, USA. (Electrologixs XP4 Crossings) Developed Application Logics for Wireless crossing operations and independent software reviewer.
  • Project: TRRA project, USA. (Microlok II & VHLC) Application Logics, Functional testing of programs by using SATS software tool as independent verified the Control Point application data and prepared the documentation as per NM Standards.
  • Project: Austria. (Microlok II). Prepared Control Point layout for verifications Microlok II data using Track Plan Application.
  • Project: RTD Eagle P3 project, Denver USA. (Electrologixs XP4 Crossings). Application Logics design Vital & Non-Vital logic updates and completed the RTVP jobs Northwest Crossings also completed the SWCI field test procedure.
  • Project: RTD Eagle P3 project, Denver USA. (Electrologixs XP4 Crossings). Application Logics updated Vital & Non-Vital logic and completed the RTVP jobs North Metro Crossings also completed the SWCI field test procedure.
  • Project: RTD Eagle P3, Denver USA – Worked on North Metro Lines Worked on Cadd updates of TOV Link Map, Programming Aspect Charts for North Metro Line.
  • Worked on North Metro line Programming correspondence Quality Assurance, Process control and FAT documentations for Segment 1B, Segment 1C and Segment 1D.
  • Project: RTD Eagle P3 project, Denver USA. (Electrologixs). Application Logics updated non-Vital logic and completed RTVP jobs for NM, GL, EC and NW Crossings also completed SWCI field test procedure
  • Project: RTD Eagle P3 project, Denver USA. (Electrologixs). Application Logics updated non-Vital logic and completed RTVP jobs for NM, GL, EC and NW Wayside also completed SWCI field test procedure.

Associate Signal Designer I

Wabtec Corporation
Bengaluru
02.2018 - 03.2019
  • RTD Eagle P3 project, Denver USA – Worked on AIS for EC and North Metro Lines.
  • Worked on Cadd updates of TOV Link Map, Programming Aspect charts for North Metro line.
  • Worked on Cadd created North Metro line Vital Ethernet Link Descriptions for approaches.
  • Worked on AIS for Eagle P3 locations EC, NW and Gold Lines.
  • Project: RTD Eagle P3 project, Denver USA. (Electrologixs). Application Logics, updated logic and completed RTVP jobs for EC, GL, NW and DUS control point locations.
  • Project: RTD Eagle P3 project, Denver USA. (Electrologixs). Application Logics, updated logic and completed RTVP jobs for GL, EC and GL Crossings also completed SWCI field test procedure.
  • Project: RTD Eagle P3 project, Denver USA. (Electrologixs). Application Logics updated Non-Vital logic and completed RTVP jobs for GL, EC and GL Crossings also completed SWCI field test procedure.
  • Application Logics, Functional testing of programs by using Vital Sim software tool created test forms for Control Point and Master Locations of North Metro line segment 1b, segment 1c and segment 1d. Application Logics, Functional testing of programs by using LCP Design tool created LCP panel for Control Point Locations of North Metro line segment 1b, segment 1c and segment 1d.
  • Project: RTD Eagle P3, Denver USA – Worked on North Metro Lines Worked on Cadd updates of TOV Link Map, Programming Aspect Charts for North Metro Line. Worked on Cadd updates in Programming sheets of Crossing locations for North Metro Line. Worked on developing of Application Logics, Functional testing of programs by using Vital Sim software tool and Functional testing by using Electrologixs Rack (Rack test) for Control points (Interlocking’s), Master locations (Intermediate Locations). Worked on Developing of PTC files and Functional testing of PTC Files by using Electrologixs Rack (Rack test) for Control points (Interlocking’s). Worked on North Metro line Programming correspondence QA FAT Documents of Segment 1B and Segment 1C. Worked on North Metro line Programming correspondence Internal Quality Assurance Check of Segment 1B, Segment 1C and Segment 1D.

Junior Engineer

Wabtec Corporation
Brngaluru
08.2016 - 01.2018
  • NS railroad, USA. (VHLC and GCP3000) - Worked on AIS Wayside design.
  • RTD Eagle P3 project, Denver USA. (Electrologixs) - Worked on developing of Application Logics, Functional testing of programs by using Vital Sim software tool on Master Locations.
  • Project: RTD Eagle P3 project, Denver USA. (Electrologixs). Application Logics, updated logic and completed RTVP jobs for Crossings.
  • RTD Eagle P3 project, Denver USA – Worked on Cadd updates of TOV Link Map, Programming Aspect charts for EC, NW and Gold Lines, Worked on AIS for Eagle P3 locations for EC, NW and Gold Lines.
  • Worked on developing of Application Logics, Functional testing of programs by using Vital Sim software tool and Functional testing by using Electrologixs Rack (Rack test) for Control points (Interlocking’s), Master locations (Intermediate Locations).
  • BNSF, USA. (Electrologixs) - Worked on Functional testing of programs by using Electrologixs Rack (Rack test) for Control points (Interlocking’s).
  • Worked on Cadd updates of TOV Link Map, Programming Aspect charts for EC, NW and GL Lines.
  • Worked on Cadd updates in Programming sheets of Crossing locations for EC, NW, GL Lines
  • RTD Eagle P3 project, Denver USA – Worked on AIS for EC and North Metro Lines. Worked on Cadd updates of TOV Link Map, Programming Aspect Charts for North Metro Line. Worked on Cadd updates in Programming sheets of Crossing locations for North Metro Line.
  • TexRail, USA. (Electrologixs / VHLC) - Worked on Functional testing of programs by using Vital Sim software tool Control points (Interlocking).

Education

Bachelor of Engineering - Electronics And Communications Engineering

BMS Collage of Engineering
Bengaluru, India
09.2018 - 08.2021

Diploma - Electronics Instrumentation And Control

M.E.I Polytechnic
Bengaluru, India
05.2014 - 05.2016

Secondary School Leaving Certificate -

Govt High School
Bengaluru, India
05.2012 - 04.2013

Skills

Interpersonal Communication

undefined

Training

  • US Railroad signaling concepts, Electrologixs, Location design, Aspect chart and Existing FDM circuit for one-month training course at Xorail LLC at Bangalore
  • Indian Railway Signaling Principles; Control Table training course at Xorail LLC at Bangalore.
  • CSX Wayside Signalling; Preliminary Engineering, Final Engineering, Aspect Charts, Designer Sketches, Hand Throw switches, Electric Lock, Switch Machines, Control Points, Automatic Signal, CSX Codes & Indications at Xorail LLC at Bangalore.
  • CSX Crossing; Equipment's & Nomenclature, Crossing Designs, Relay logic at Xorail LLC at Bangalore.
  • RTD Programming, Functional testing by using Vital Sim software tool of Control Points and Master Locations training course at Xorail LLC at Bangalore.
  • RTD Functional testing by using Electrologixs Racks of Control Points and Master Locations training course at Xorail LLC at Bangalore.
  • BNSF Functional testing by using Electrologixs Racks (Rack Test) of Control Points training course at Xorail LLC at Bangalore.
  • Reduced Test validation procedure - Detailed description and procedure followed training course at Xorail LLC at Bangalore
  • UPRR Railroad; PTC communications wayside interfacing with locomotive system.
  • CSX Programming, Functional testing by using Signal Application Test System tool of Control Points and Master Locations training course at Xorail LLC Bangalore Campus.
  • Attended Course for Safety Leadership Training (MTM Railroad); overview of Clapham junction rail accident, case study, MTM web portal, Quiz-MTM standards inductions for the signal design at Xorail Inc Bangalore Campus.
  • Attended the Virtual IL XP-4 Training class for Crossing controller operations and design developments at Microsoft Teams meeting.
  • VTUSA XP-4 Crossing Training, Logic Sketch Design, IP addresses scheme for TCP configurations, DAX, and ISLAND configurations at Microsoft Teams meeting.
  • Caltrain Wireless Crossing Training, project standards and Quality check/Quality assurance, QC check list verifications at Microsoft Teams meeting.
  • Caltrain Wireless Crossing Training for Brightline and Caltrain project Hardware RACK testing, 2SC logic review for wireless implementation, 2 speed check traditional approach operations, ARM, Express and station stop operations with time to crossing & time to clear the crossing condition (TTC & TTCC) at Microsoft Teams meeting.
  • Wireless Crossing Training, Overview of crossing function, Field WIU, CBCO, communication b/w TMC to WIU, message sequence and COM settings configurations. at Microsoft Teams meeting
  • PTC Sub-div developments training, overview of PTC sub-div developments, PTC architecture, PTC data modeling, different version of DATA, testing CFV/RSV/WIU and V & V after validations, Basic of IVOC technology at Wabtec industrial private limited Bangalore.

Software

Micro Station V8i

ACE Compiler Tool

ACE Validator Tool

VSLS Simulation Engine Tool (Vital SIM)

Signal Application Test System (SATS)

Virtual Serial Ports Emulator (VSPE)

Vital Remote Emulator tool (VRE)

Virtual Local Control Panel Emulator (VLCPE)

Track Plan (Microlock II layout builder)

AutoCAD

MS Office

Power draft

Blood Group

O +ve

Marital Status

Unmarried

Certification

ARM Cortex Soc for Embedded

Timeline

Lead Engineer, Signalling

Wabtec Corporation
10.2023 - Current

ARM Cortex Soc for Embedded

06-2022

Senior Engineer, Signalling

Wabtec Corporation
10.2021 - 09.2023

Engineer, Signalling

Wabtec Corporation
04.2019 - 09.2021

Bachelor of Engineering - Electronics And Communications Engineering

BMS Collage of Engineering
09.2018 - 08.2021

Associate Signal Designer I

Wabtec Corporation
02.2018 - 03.2019

Junior Engineer

Wabtec Corporation
08.2016 - 01.2018

Computer Hardware and Networking

09-2015

Diploma - Electronics Instrumentation And Control

M.E.I Polytechnic
05.2014 - 05.2016

Secondary School Leaving Certificate -

Govt High School
05.2012 - 04.2013
Pavan Vaddanahal KenchappaLead Engineer, Signalling