Princy M T

RF Design and System Engineer with extensive experience in RF system development, covering architecture, simulation, schematic design, PCB layout, and testing. Skilled in using ADS, HFSS, and CST, with proficiency in test instruments such as VNA, spectrum analyzers, and signal generators.

1) Sar receiver subsystem development (R&D project)

• Designed and developed the receiver subsystem for a synthetic aperture radar (SAR) targeting human and arms detection.
• Defined full receiver architecture, including RF front-end, ADC interface, and signal processing chain
• Performed schematic design in KiCad and PCB layout with ADS, generating production-ready Gerber files
• Selected and sourced key RF ICs, and compiled the Bill of Materials (BoM) for cost and integration planning
• Conducted hardware validation

2) T/R module architecture and schematic design (R&D project)

• Designed the complete transmit/receive (T/R) module architecture for radar front-end applications
• Developed schematics covering PA, LNA, RF switch network, limiter, and biasing circuits for robust performance
• Focused on optimizing gain, linearity, isolation, and protection in the RF signal path
• Supported RF layout and system integration with simulation-based design verification

3) Design of 1:16 unequal power divider

• Designed a 1:16 unequal power divider operating at 9.5 GHz for radar signal distribution
• Used Rogers 4003 substrate for optimal high-frequency performance and low dielectric loss
• Focused on achieving precise power-splitting ratios and impedance matching across all output ports

4) Antenna isolation testing and absorber study

• Executed antenna isolation testing in an anechoic chamber, targeting -80 dB isolation between radar antennas
• Analyzed the effect of various RF absorbers on inter-antenna coupling and isolation performance
• Collected and interpreted measurement data to guide physical antenna layout and absorber placement in the final system design

5) CMC modeling and mixed-mode analysis (Bosch – R&D project)

• Conducted characterization of common mode chokes (CMCs) and mixed-mode S-parameter analysis for automotive Ethernet
• Targeted standards: 100BASE-T1, 1000BASE-T1, 2.5GBASE-T1, and 10GBASE-T1.
• Designed a custom high-speed test fixture enabling precise CMC measurements for automotive ECUs.
• Improved signal integrity and EMC performance to ensure compliance in high-speed automotive communication systems.

• Paper accepted at APSAR 2025: 'Self-calibrated radar architecture for FMCW SAR application'
• Qualified GATE 2021
• State-level participant in the Young Innovators Programme by K-DISC
• State level participant in Young Innovators Programme by K-DISC