Robin John
Design and Integration Lead
Bengaluru
Summary
Adept Design and Integration Lead with a proven track record at Intel, specializing in SoC integration and ARM processor architectures. Excelled in leading high-impact teams towards timely deliverables, demonstrating expertise in Verilog/System Verilog and effective project management. Skilled in driving the ASIC development lifecycle from architectural specification to system integration, ensuring top-quality outcomes.
Overview
10
10
years of professional experience
7
7
years of post-secondary education
Work History
Design and Integration Lead
Intel
2019.11 - Current
- Experience with integration of SoC’s with ARM processors, complex bus architectures.
- Lead entire SoC integration process, including LEC, LINT checks, and CDC/RDC analysis, to guarantee top-quality deliverables to Physical Design Team.
- Experience in managing Micro-architecture specification and its RTL implementation and integration of Image Processor IP.
- Manage high-impact front-end team of 3 members and ensure their deliverables are completed on time.
- Well-versed in ASIC development lifecycle, covering architectural specification, vendor collaboration, DFT, Physical Design, packaging, post-silicon validation, and system integration.
Design Engineer II
Xilinx (AMD)
2017.09 - 2019.11
- Working knowledge of DDR/LPDDR JEDEC protocol and DDR PHY designs.
- HBM/DDR4 performance Validation on Hardware.
- Hands on experience with System Verilog/System Verilog coding.
- Knowledge of Perl/Shell scripts.
Application and Solution Engineer
Lattice Semiconductor
2014.03 - 2017.08
- RTL design of MIPI CSI2/DSI Tx/Rx micro blocks.
- Proficient in PCIe and MIPI CSI2 protocols.
- Experienced in post-silicon bring-up and demo creation.
Education
Master of Science - MicroElectronics
Birla Institute of Technology And Science, Pilani
Pilani 2020.07 - 2022.06
Post Graduation Diploma - Advance VLSI Design
C-DAC
Mumbai 2013.12 - 2014.07
Bachelor of Science - ECE
Lovely Professional University
Punjab 2009.08 - 2013.08
Skills
Scripting: Perl/shell/TCL
Timeline
Master of Science - MicroElectronics
Birla Institute of Technology And Science, Pilani
2020.07 - 2022.06
Design and Integration Lead
Intel
2019.11 - Current
Design Engineer II
Xilinx (AMD)
2017.09 - 2019.11
Application and Solution Engineer
Lattice Semiconductor
2014.03 - 2017.08
Post Graduation Diploma - Advance VLSI Design
C-DAC
2013.12 - 2014.07
Bachelor of Science - ECE
Lovely Professional University
2009.08 - 2013.08