SAI DEEPTHI PALAGIRI

Contribution

• Developed RTL code for digital circuits using Verilog/VHDL, focusing on optimizing performance and area.
• Implemented synchronous and asynchronous logic and performed timing analysis to meet design specifications.
• Collaborated with cross-functional teams, including verification engineers, physical design engineers, and software developers, to ensure seamless integration of RTL designs.
• Documented design specifications, test plans, and verification results to facilitate knowledge sharing and future design iterations.

Skills and Tools

• Languages: Verilog
• Tools: ModelSim,, Vivado
• Skills: RTL Design, Timing Analysis, Synthesis, Debugging, Power Optimization.

Contribution

• Monitored the FlexCube application environment to ensure high availability and performance, utilizing tools such as Oracle Enterprise Manager( SQL)
• Troubleshot and resolved production issues, including batch job failures, data discrepancies, and system errors, ensuring minimal downtime and disruption.
• Collaborated with development teams and DBAs to perform root cause analysis and implement fixes, reducing recurring issues by 50 %.
• Provided technical support and training to end-users, addressing queries related to FlexCube functionalities and resolving user-reported issues effectively.
• Developed and maintained support documentation, including knowledge base articles and troubleshooting guides.

Skills and Tools

• Application Support: FlexCube, Oracle Core Banking Solutions
• Monitoring Tools: Active Console,Tectia Tool , FMS Portal
• Database Management: Oracle Database, SQL
• Incident Management: ServiceNow
• Technical Skills: Batch Job Management, System Performance Tuning, Root Cause Analysis