Shashidhar Kethipalli

Projects: REM (Montreal Metro, Canada), and Indore Metro Rail.

Scope of work: To perform validation activities and manage lead activities by coordinating with project stakeholders.

Activities include:

• Performing validation activities through the software test bench in the VMware cloud environment.
• Attending KOM meetings for every baseline before starting the test activities.
• Integrating the bench data received from different subsystems (ATC, CBI, and ATS).
• Creating and updating test cases in RTD (Requirement Test Description) in accordance with SyRS (System Requirements).
• Project functionality testing by following the test cases mentioned in the RTD (test description).
• Raising change requests (CRs) in IBM ClearQuest for any abnormalities found while testing.
• Coordinating with the T&C team to address issues and to fill the gap between FIVP and T&C.
• Releasing the FIVP report to the site, mentioning all the tested functionalities, along with restrictions and anomalies.
• Involving and presenting different functionalities of the project to the client/customer during IFAT (in-house).

Role: Rail Signaling Design Engineer

Projects: MBTA (Massachusetts Bay Transportation Authority)

Scope of work: To design application logic for cut sections between interlocking.

Activities include:

• Designing and production check of software logic for the cut section by taking required inputs (control lines, interface plan, hardware book of plans).
• Updating logic based on comments received from the customer and the independent checker.
• Raising change requests (CRs) for updates and maintaining document control/configuration management in Team Center.

Role: System Validation Engineer.

Projects: CTA (Chicago Transit Authority)

Scope of work:

Preparing PPDS (pre-populated data sheets) in accordance with test procedures developed by the client.

Validation activities include:

• Creating PPDS (pre-populated data sheets) - implementing test cases before testing the actual procedure on the System Integration Platform (SIP) hardware/software simulation.
• FAT - Factory Acceptance Test activities include creating data sheets for test procedures of vital interlocking operations (detector locking, approach locking, route locking, switch locking, track locking) and non-vital interlocking operations (local panel commands and indications of various devices like points, signals, track block/unblock).
• SAT-Site Acceptance Test activities include creating data sheets for Vital Interlocking operations, Non-Vital Interlocking operations, and support in site activities.

Role: System Design Verification Engineer.

Projects: Lusail (LRT), Riyadh (Line 4 & 6), Guadalajara (GDL), Montreal (REM), Mumbai (Line 2 & 7), Thomson-East Coast Line (TEL, Singapore), Kochi, Toronto.

Scope of work:

Performing verification activities on system designs in accordance with signaling principles, the verification process, and producing the verification reports with safety analysis.

Verification activities include (L1/L2 verification):

• Verification of safety and non-safety activities form GFPD (Guidelines for Project Deployment) using project data and other tools.
• KP-SyDT consistency with respect to track survey, civil drawings, and AutoCAD.
• Train Movement Specifications.
• SyNR (System Naming Rules) verification with respect to SYDT.
• Real-time issue (RTI) verification.
• Scheme plan verification with respect to SyDT.
• Approach locking distance optimization.
• Parameter consistency in accordance with the documents GFPD (Guideline for Project Deployment), system requirement specification (SyRS), and System Datatable (SyDT).
• Producing all verification reports with safety, functional, and operational analysis.