Summary
Overview
Work History
Education
Skills
Websites
Projects
Experience
Timeline
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Shiny Jose

Shiny Jose

Summary

As an innovative thinker and problem solver, i am detail-oriented and analytical with a creative and strategic approach to planning.i am tech-savvy , enthusiastic ,passionate about continous improvement and driven by curiosity and improvement.

Overview

2
2
years of professional experience

Work History

Physical Design Training

VLSI GURU
01.2024 - 07.2024
  • Completed VLSI physical design training with focus on optimizing chip design , from floor planning to final routing and timing checks.
  • Specialized in VLSI physical design , learning to enhance chip performance through effective layout , placement and timing strategies.
  • Expertise experience with industry - standard EDA tools such as synopsis IC compiler II.
  • Demonstrated ability to work on design rule checks (DRC) , layout versus schematic (LVS) checks and parasitic extraction.
  • Possess strong analytical skills , attention to detail, and the ability to learn and adapt quickly in a fast - paced environment.
  • Committed to contributing to innovative semiconductor solutions and advancing technology.
  • Documented system configurations and procedures for knowledge sharing within the team.
  • Participated in disaster recovery planning and drills to ensure business continuity in case of emergencies.

Student project

ISRO, IISU, MISA
Trivandrum
01.2022 - 07.2023
  • Op-amp based Pi controller has been developed, and the controller controls variations in a specific level while monitoring the beam intensity.
  • A control system based circuit for regulating laser beam intensity was designed through tests to record intensity variations, specify the input range of data, and construct the circuit.
  • Hardware was connected and tested electrically after being wired in accordance with the circuit.
  • Examined how the circuit responded to different input levels and levels of reference voltage.
  • Tested the laser beam intensity control circuit's performance.

Education

Mtech - Applied electronics and instrumentation

CET
Trivandrum
01.2023

Bachelor of engineering - electronics and communication

Anna university
01.2021

Skills

  • Pnr tool
  • TCL scripting
  • Control system design
  • MATLAB
  • Circuit designing
  • Good communication skill
  • project management
  • Chip level integration
  • Custom macros/IPs
  • critical thinking
  • Project Management

Projects

Block level Implementation - ORCATOP 32-bit Multi voltage processor (ICC-2) 28nm, 01/01/24, Physical implementation of a block-level design (Netlist to GDSII) at 28nm technology, using 40 macros and standard cells 52k., Clock frequency of 435MHz., Supply voltage of 0.75V and 0.95V using 9 metal layers + MRDL., IR-drop 5., Operating voltage area and area 70mm2., Synopsis IC compiler (IIC2) PLL divider, 16nm present., 16nm technology, 12 layers, 153 macros, 2.2M cell count, 425MHz frequency., Synthesis, floor planning, timing analysis (time runs + fixes)., DRV (max trans, cap, fanout), IRRV fixes, scripting., Fusion compiler, Primetime, Calibre, StarRC.

Experience

Lucas-TVS Ltd,Puducherry ( 2017-2018)

 Quality auditor.

  • Collected, analyzed, and reported on quality metrics, and improved product quality by implementing failure analysis and corrective actions

Timeline

Physical Design Training

VLSI GURU
01.2024 - 07.2024

Student project

ISRO, IISU, MISA
01.2022 - 07.2023

Mtech - Applied electronics and instrumentation

CET

Bachelor of engineering - electronics and communication

Anna university
Shiny Jose