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Asic Digital Design, Staff Engineer

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Associate Principal Engineer

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Design Verification Engineer skilled in ensuring the functionality, correctness, and reliability of complex digital designs. Expertise in creating and executing verification plans, developing test benches , and utilizing industry-standard verification methodologies such as UVM, System Verilog, and SV assertions. Proficient in simulation tools like Questa, with a strong understanding of digital design principles and protocols (e.g., AXI, AHB, APB). Knowledgeable in formal verification, functional verification.

Dynamic and results-driven engineer with hands-on experience at ISRO in ASIC design and simulation. Proficient in digital electronics and FPGA prototyping using Verilog HDL, I excel in teamwork and communication. Passionate about leveraging AI concepts to drive innovation and enhance design accuracy in cutting-edge projects.

Hello, I am 28 years old, I have 3 years of professional experience. I am a hardworking, disciplined, self-sacrificing and duty-conscious person. I am confident in designing schematics and circuits. I love doing R&D engineering to follow and adapt to the developing technology. I don't have any problems with reading and writing in English, but I study English in my private time because my speaking practice is lacking. I love doing artistic and cultural events. In addition to these, I am interested in learning computer programming languages as a hobby.

Dynamic and results-driven Senior Hardware Engineer with 6+ years of hands-on experience in high-speed circuit design, schematic development, signal and power integrity analysis, hardware validation, and system-level debugging. Proven track record of taking complex board-level hardware from concept to production with precision and performance in mind. Adept at using advanced simulation tools, lab instrumentation, and cross-functional collaboration to deliver reliable, scalable hardware solutions across automotive, consumer electronics, and embedded systems domains.Now seeking to channel a strong foundation in hardware engineering into cutting-edge driver hardware design,bringing not just technical proficiency, but a relentless drive to learn, innovate, and contribute to the next generation of intelligent hardware interfaces. Equally comfortable diving into low-level driver interactions, hardware-software co-design, and performance tuning to ensure seamless integration between silicon and system.

Tanveer Behl

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ASIC Digital Design, Staff Engineer

DFT Engineer

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M.Tech - DTI (Digital VLSI)

B.Tech - ECE

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ASIC Digital Design, Staff Engineer

DFT Engineer

M.Tech - DTI (Digital VLSI)

B.Tech - ECE

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