Srinivas Kulkarni
Bangalore
Summary
A research-oriented individual seeking an entry-level role to kickstart my professional journey, where I can apply the knowledge and skills I have gained to contribute to the growth of the organization, society, and myself. Collaborative and results-driven, with a proven ability to excel in fast-paced, deadline-driven environments.
Overview
1
1
year of professional experience
4
4
Languages
Work History
Internship Trainee
Maven Silicon
06.2024 - 08.2025
- Completed VLSI Design and Verification training from Maven Silicon, Centre of Excellence in VLSI.
- Received comprehensive hands-on training in ASIC/FPGA Front-End Design and Verification using Verilog, SystemVerilog, and UVM methodologies.
- Gained in-depth exposure to VLSI concepts, EDA tools, industry-standard verification methodologies, and practical project development aligned with semiconductor industry practices.
Education
Bachelor of Engineering - Electronics & Communication
DAYANANDA SAGAR COLLEGE OF ENGINEERING
01-2024
Class 12 - Physics, Chemistry, Mathematics, Biology
NARAYANA PU COLLEGE
01-2020
Class 10 -
NARAYANA E TECHNO, CENTRAL BOARD OF SECONDARY EDUCATION
01-2018
Skills
HDL - Verilog (Beginner)
HVL - System Verilog (Beginner)
Random Coverage (CRCDV) (Beginner)
Verification Methodologies - UVM (Beginner)
Constraint Driven Verification (Beginner)
Digital Electronics (Beginner)
Static Timing Analysis (Beginner)
EDA Tools - ModelSim
Questa Sims
Synopsys Design Compiler
Synopsys VCS
VC Spyglass
Xilinx (Beginner)
System Verilog Assertions (SVA) (Beginner)
Linux OS (Beginner)
Windows OS (Beginner)
Timeline
Internship Trainee
Maven Silicon
06.2024 - 08.2025
Bachelor of Engineering - Electronics & Communication
DAYANANDA SAGAR COLLEGE OF ENGINEERING
Class 12 - Physics, Chemistry, Mathematics, Biology
NARAYANA PU COLLEGE
Class 10 -
NARAYANA E TECHNO, CENTRAL BOARD OF SECONDARY EDUCATION