Summary
Overview
Work History
Education
Skills
Strengths
Timeline
Generic

Bharat Bhushan

NOIDA

Summary

With six years of experience working as a Design Engineer under various designations, having strong academic background in circuit designing and simulations, I strive to bring high-quality business intelligence solutions to businesses seeking higher efficiency. With expertise in advanced Input-Output Designs, Interface Protocols, I have worked on difficult projects and was able to deliver the results as per the customer requirement.

Overview

6
6
years of professional experience

Work History

Technical Lead

STMicroelectronics
GREATER NOIDA
04.2024 - Current
  • Designed the GPIO , I3C and SPI for the required SPECIFICATIONS.
  • Met specs for the I2C block for different modes.
  • Delivered the cells successfully after working with the Layout Team to ensure the critical blocks are not affected by the parasitics.
  • Designed a SCHMITT to negate the noise effects on th SUPPLY and INPUT with successfully reducing the effects of noise from HYSTERISYS MARGIN (-30mV) to more than 40mV.
  • Was able to achieve the spread for VIH and VIL for the SCHMITT similar to the SCHMITT without noise.

Sr. Design Engineer

STMicroelectronics
GREATER NOIDA
07.2022 - 03.2024
  • Worked on the different GPIOs . All the Designs were individually handled and delivered.
  • Designed a PWM IO with the DELAY SKEW spec of 250ns.
  • Improved the Duty cycle of the Receiver making necessary modifications in the circuit.
  • Completed the Monte Carlo Analysis on the SKEW DELAY.
  • Worked on the PROGRAMMABLE GPIO with different drive strengths.
  • Delivered the cells succesfully after working with the Layout Team to ensure the critical blocks are not affected by the parasitics

Project Engineer

Wipro Technologies PVT. LTD.
Bengaluru
05.2021 - 06.2022
  • Was part of the team working on the DDR5 for the client intel.
  • Worked on the simulations for Transmitter block and analysis the same based on the quality standards such as ageing.
  • Monitored work performance against established milestones ensuring adherence to approved schedules.

Design Engineer

Invecas
NOIDA
08.2018 - 04.2020
  • Designed High Speed GPIO's (200 MHz) on 28nm FDSOI and 14nm
    FinFET technology with 1.8V tolerant devices with supply being 3.3V.
  • Designed the Pre Driver and Level shifter for 1v8 and 3v3 mode keeping the Duty Cycle within the desired limits.
  • Designed the P-driver and N-driver with appropriate sizes to support the desired current strength.
  • Designed the Receiver and Level Down shifter for 1v8 and 3v3 mode using 1v8 devices ensuring devices are not under stress.

Education

B.Tech - ELECTRONICS AND COMMUNICATION

CUSAT
KOCHI
05-2018

XII - ISC

R.N.T.S. College
Sitamarhi
04-2013

X - C.B.S.E.

Hellen's Public School
Sitamarhi
04-2011

Skills

  • Virtuoso
  • ELDO
  • SOA
  • MONTE CARLO
  • ADOC
  • PERC/ERC
  • SCHMITT
  • I3C
  • GPIO
  • I2C
  • FILTERS

Strengths

  • Hard-working and Diligent
    Was promoted to a new position after 1.5 years of joining a new organization
  • Innovative Solutions and Out of the Box Thinking
    Resulting in Novel Methods to meet Stringent Design Specifications

Timeline

Technical Lead

STMicroelectronics
04.2024 - Current

Sr. Design Engineer

STMicroelectronics
07.2022 - 03.2024

Project Engineer

Wipro Technologies PVT. LTD.
05.2021 - 06.2022

Design Engineer

Invecas
08.2018 - 04.2020

B.Tech - ELECTRONICS AND COMMUNICATION

CUSAT

XII - ISC

R.N.T.S. College

X - C.B.S.E.

Hellen's Public School

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