Debayan Mazumdar
Pune
Summary
Skilled VLSI Hardware Engineer working with Qualcomm with a proven track record in MBIST architecture and DFT verification. Skilled in collaborating across teams to achieve tapeout readiness, while demonstrating strong problem-solving abilities. Experienced in utilizing Synopsys tools to enhance design verification processes in high-performance SoCs.
Overview
4
4
years of professional experience
1
1
Certification
Work History
Associate DFT Engineer
Qualcomm
Bangalore
01.2024 - Current
- Developed and implemented SMS MBIST architecture for various memory instances in high-performance SoCs.
- Performed MBIST insertion, DFT RTL modifications, and DFT verification simulations.
- Supported post-silicon validation, including pattern bring-up, failure debug, and repair validation.
- Collaborated with RTL, STA, and ATPG teams to ensure DFT signoff and tapeout readiness.
Hardware Engineer
Imagination Technologies
Pune
01.2023 - 12.2023
- Working as an intern from January 2023 to June 2023, thereafter a full-time engineer.
- Building a UVM based verification environment for AXI protocol converter design, which converts 'fixed', 'incremental' and 'wrap' type burst transactions, to 'increment' type.
- Used Synopsys tools (like VCS and Verdi) for compilation, elaboration, simulation and coverage report.
- Carried out VHDL to SV conversion of AXI IPs, and ran formal verification using Synopsys Formality.
Intern
Accel Systems
Pune
11.2021 - 03.2022
- Created a universal 8-channel data logger using Raspberry Pi.
- Carried out the GUI development using Kivy library in Python.
- Implemented storage and reporting of data on excel sheet.
Education
Bachelor of Technology - Under Graduate
Pune Institute of Computer Technology
Pune, India06-2023
Junior College
Loyola Junior College
Pune, India03-2019
School
Loyola High School
Pune, India03-2017
Skills
- DFT verification
- MBIST architecture
- RTL modifications
- UVM verification
- Post-silicon validation
- Synopsys tools usage
Certification
- Verilog Language and Application
- SystemVerilog for Design and Verification (Badge)
- Essential SystemVerilog for UVM
Timeline
Associate DFT Engineer
Qualcomm
01.2024 - Current
Hardware Engineer
Imagination Technologies
01.2023 - 12.2023
Intern
Accel Systems
11.2021 - 03.2022
Bachelor of Technology - Under Graduate
Pune Institute of Computer Technology
Junior College
Loyola Junior College
School
Loyola High School
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