Kantha Rao BORA
Pre-Post Silicon Validation Engineer
Srikakulam
Summary
Intelligent and qualified Validation Engineer with extensive experience assessing software systems for alignment with specifications and project goals. Talented at documenting and reporting for accurate recordkeeping. Enthusiastic professional with focus on effectively analyzing test results.
Overview
5
5
years of professional experience
17
17
years of post-secondary education
Work History
Pre & Post Silicon Validation Engineer
Texas Instruments India
10.2021 - Current
- SoC Bring ups on Emulation Platform.
- Writing Test-Benches as per the SoC validation requirements.
- Create Emulation Builds automation.
- SoC IP Ownership for McASP, MCAN, LIN, McSPI, I2C, UART, RTI, WDT, EPG and GPIO for validation.
- SoC Power Management and Power Measuments.
- Understand the SoC Architecture, Clocks, Reset, Interrupts, Pinmux.
- Create IP/SoC Test Plans and Developing them in Pre-Silicon.
- Create and Develop SoC stress tests and Use Cases.
- Debug Test failures, Waveforms/RTL level debug.
- Collaborate with DV, ROM and SW teams for full SoC execution.
- Silicon Bringups, execution of Pre-Silicon tests.
Applications Engineer
Synopsys India
03.2019 - 10.2021
- Running Regression jobs for ZeBu Emulator which includes monitoring, fixing, reporting bugs to R&D for all active ZeBu Releases
- Bring Up customer PHYs in ZEBU emulation flow
- Modification of customer XTOR TBs from ZCEI to DPI (new technology).
TECHNICAL ENGINEERING – INTERN
Synopsys India
03.2019 - 10.2021
- Handling ZeBu XTORs/MMs Regressions
- Validation of all the Synopsys XTORs/MMs with ZEBU patches.
Education
Bachelor of Science - Electronics And Communications Engineering
Rajiv Gandhi University of Knowledge Technologies
Nuzvid 04.2001 - 05.2018
PUC - MPC
Rajiv Gandhi University of Knowledge
Nuzvid04.2014
Skills
Palladium XP2 and Z1, ZeBu ZS3/ZS4/SimXL
Verilog/System Verilog, C/CSoC architecture
Demonstrated ability to manage multiple complex projectsAssignments with high level of autonomy and accountability for resultsSilicon Bring Up
SoC/IP Debug
Activities
- Butterfly Inspired Multi-Robotic Swarm for Signal Source Localization, Conferences on Advance in Robotics, AIR’17, IIT Delhi, 2017, https://dblp.uni-trier.de/pers/hd/b/Bora:Kantha_Rao
- One research paper is selected for the IEEE International Conference on Robotics and automation (ICRA) 2017, held in Nanyang Technological University (NTU) Singapore on 29th may to 1st Jun 2017.
Accomplishments
- Butterfly Inspired Multi-Robotic Swarm for Signal Source Localization Paper selected in Conferences on Advance in Robotics, AIR’17, IIT Delhi, 2017.
Link: https://dblp.uni-trier.de/pers/hd/b/Bora:Kantha_Rao
- One research paper is selected for the IEEE International Conference on Robotics and automation (ICRA) 2017 which is held in Nanyang Technological University (NTU) Singapore on 29th may to 1st Jun 2017.
Hobbies
- Playing Badminton
Timeline
Pre & Post Silicon Validation Engineer
Texas Instruments India
10.2021 - Current
Applications Engineer
Synopsys India
03.2019 - 10.2021
TECHNICAL ENGINEERING – INTERN
Synopsys India
03.2019 - 10.2021
Bachelor of Science - Electronics And Communications Engineering
Rajiv Gandhi University of Knowledge Technologies
04.2001 - 05.2018
PUC - MPC
Rajiv Gandhi University of Knowledge