Mahima Joshi
Ahemdabad
Summary
Flexible hard worker ready to learn and contribute to team success.
Overview
3
3
years of professional experience
Work History
RTL Engineer
Optimized solutions
Ahemdabad
01.2022 - Current
- Designed state machines with Finite State Machines and implemented in Verilog code.
- Developed RTL designs for System-on-Chip projects using Verilog and VHDL.
- Analyzed and debugged FPGA designs, focusing on Verilog code and timing constraints.
- Utilized CAD tools for schematic capture of printed circuit boards.
- Maintained comprehensive technical documentation, including design files and testing protocols.
- Led component selection process, evaluating specifications and cost implications.
- Developed and tested System-on-Chip designs using various hardware description languages.
- Optimized workflows through effective technical documentation management.
Education
B.Tech - Electronics And Communication Engineering
L.D.College of Engineering
Ahemdabad06-2022
Diploma - Electronics And Communication Engineering
Goverment Girls Polytechnic
Ahemdabad06-2019
Skills
- Verilog coding
- VHDL development
- FPGA debugging
- System-on-Chip design
- Schematic capture
- Technical documentation
- Engineering documentation
protocols
- SPI
- I2C
Evalution Boards
- Zcu102
- Zc702
- Max10
- Virtex
Software
- Orcad
- Xilinx Vivado
- SDK
- Orcad
- Eagle
- LT spice
- Windchill
- EDA play ground
- Visual Studio Code
Timeline
RTL Engineer
Optimized solutions
01.2022 - Current
B.Tech - Electronics And Communication Engineering
L.D.College of Engineering
Diploma - Electronics And Communication Engineering
Goverment Girls Polytechnic