Naveen Ninganur
Bengaluru
Summary
Lead Digital Design Engineer with over 14 years of experience designing and developing high-performance integrated circuits for the Image processing, automotive and communication sectors.
Overview
14
14
years of professional experience
Work History
Principal Design Engineer
Onsemi India Pvt. Ltd.
01.2018 - Current
- Developed advanced level Verilog code for ASIC design solutions for Image sensor projects
- Designed and simulated complex digital designs for algorithms for image quality improvement
- Implemented algorithms for Bayer Global Tone Mapping (bgTM), Dark current correction, Overflow Linearization and Multiple exposure combination
- Validated these algorithms on silicon and improvised the algorithms on next generations of sensors
- Worked on Area and Power optimization of sensors
- Developed controller for OTPM an embedded memory
- Implemented Cybersecurity system (CSS) for Image sensor in automotive application
- Developed complete end-to-end solution for image sensor security using ARM cryptocell312 IP and Cortex M0+ processor to provide authentication of video stream using GMAC and CMAC encryption system
- Worked closely with firmware team to validate CSS on silicon.
Sr. ASIC Design Engineer II
WaferSpace
11.2014 - 12.2017
- IP development for SOCs
- Developed the Unified Protocol (UniPro), a layered protocol for interconnecting devices and components within mobile device systems
- It is applicable to a wide range of component types including application processors, coprocessors and modems, as well as different types of data traffic including control messages, bulk data transfer and packetized streaming
- Developed Universal Flash Storage (UFS), a JEDEC data transfer standard designed for mobile systems
- UFS applications were implemented to efficiently move large data between a host processor and mass storage devices.
Module Lead
Continental Automotive
08.2011 - 11.2014
- Developed advanced level Verilog code for ASIC design solutions for multiple automotive projects
- Designed and simulated complex digital designs using VHDL and Verilog HDL
- Participated in design reviews, timing and power analysis, synthesis, and simulation
- Created and maintained register transfer level (RTL) design documents.
Fpga Design Engineer
Alpha Design Technologies Pvt. Ltd.
03.2010 - 07.2011
- Developed a custom FPGA design to meet the requirements of a demanding defence system
- Designed and implemented complex state machine designs for a high frequency system
- Developed custom IP cores for use in FPGA designs including controllers, arithmetic logic units, and data converters for Software defined Radio.
Education
Future Leaders Programme -
National University of Singapore
05.2023
FPGA Design -
Sandeepani
01.2010
BE (Electrical & Electronics Engineering) -
Dayananda Sagar College of Engineering
07.2009
Skills
- System Verilog/ Verilog/ VHDL
- RTL Design
- SoC Design, ARM Cortex M0, AHB
- Timing Analysis
- Logic Optimization
- Lint/ CDC
- Cybersecurity
- ASIC Synthesis
- Power Analysis
- Post Silicon Validation
References
References available upon request
Timeline
Principal Design Engineer
Onsemi India Pvt. Ltd.
01.2018 - Current
Sr. ASIC Design Engineer II
WaferSpace
11.2014 - 12.2017
Module Lead
Continental Automotive
08.2011 - 11.2014
Fpga Design Engineer
Alpha Design Technologies Pvt. Ltd.
03.2010 - 07.2011
Future Leaders Programme -
National University of Singapore
FPGA Design -
Sandeepani
BE (Electrical & Electronics Engineering) -
Dayananda Sagar College of Engineering
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