Accomplished Senior Staff Engineer with over ten years of experience in semiconductor design and verification, specializing in UVM and System Verilog. Proven expertise in managing complex projects within fast-paced R&D environments, consistently delivering high-quality verification outcomes. Proficient in PCIe, with a strong commitment to fostering team collaboration and skill development through mentorship and knowledge sharing, driving continuous improvement and efficiency across projects. Postgraduate qualifications in VLSI & Embedded Systems and Human Resource Management complement a robust technical foundation, enhancing the ability to lead teams effectively.