R. BHAGYA LAKSHMI
Electronics And VLSI Enthusiast
Visakhapatnam ,Andhra Pradesh
Summary
I am an enthusiastic undergraduate student with a strong foundation in VLSI and digital design ,currently exploring fields in technology by working on different projects and acquiring new skills that can help in move forward in career.
Overview
1
1
year of professional experience
2
2
Certifications
3
3
Languages
Work History
Asynchronous FIFO
KT Semicon
02.2026 - 03.2026
- Architected and implemented an asynchronous FIFO buffer to enable reliable data transfer across independent clock domains (CDC).
- Designed Gray code–based read and write pointer logic to minimize metastability and synchronization hazards.
- Implemented multi-flip-flop synchronizers and pointer comparison logic for robust full and empty flag generation.
- Performed functional validation under asynchronous clock conditions.
UPASTHITHI-SAMACHAR
02.2025 - 02.2025
- Developed a Flask-based attendance monitoring system to manage and analyze student attendance data.
- Implemented threshold-driven backend logic to automatically detect low attendance scenarios.
- Interfaced Flask with Twilio APIs to programmatically trigger automated outbound voice calls to students.
- Enabled event-driven alert execution through secure RESTful API integration between Flask and Twilio.
Education
B.Tech - ECE
GVP College of Engineering
Visakhapatnam, India01-2027
Intermediate -
Narayana Junior College
Visakhapatnam, India03-2023
SSC -
Sri Chaitanya Techno School
Visakhapatnam, India04-2021
Skills
- Verilog HDL
- C
- Xilinx Vivado
- Virtual Box
- MATLAB
- Digital Electonics
Certification
Design & Verification – KT Semicon
Timeline
Design & Verification – KT Semicon
04-2026
Asynchronous FIFO
KT Semicon
02.2026 - 03.2026
RTL Design – Siliconnsand Box
10-2025
UPASTHITHI-SAMACHAR
02.2025 - 02.2025
B.Tech - ECE
GVP College of Engineering
Intermediate -
Narayana Junior College
SSC -
Sri Chaitanya Techno School