Summary
Overview
Work History
Education
Skills
Projects
Timeline
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Rama Sirisha Avvaru

Rama Sirisha Avvaru

Bangalore

Summary

R&D Engineer with 4 years of experience in embedded systems and optical communication, successfully delivering 5 projects from inception to completion. Proven leadership in managing a team of 18 junior engineers, fostering both technical innovation and professional development. Strong problem-solving abilities complemented by a passion for learning new technologies and tools. Excellent communication skills enhance collaboration and drive project success.

Overview

4
4
years of professional experience

Work History

R&D Engineer | Team Lead

United Telecoms Ltd
Bangalore
02.2021 - Current
  • Led a 20-member team in delivering more than five optical networking products, including 100G, 200G, and 400G muxponder platforms.
  • Designed scalable codebases supporting multi-card configurations, reducing dev time by 60%.
  • Developed QSFP28 and CFP2 Linux user-space drivers, and protocol modules for real-time optical systems.
  • Upgraded the 200G platform to support 400G and 800G, ensuring next-gen hardware readiness.
  • Established testing processes using EUnit, Common Test, and Testlink, improving issue detection by 70%.
  • Mentored junior engineers, promoted best practices, and improved team productivity.

Education

Bachelor of Technology - Electronics And Communication Engineering

Jain University
Bangalore, Karnataka
06-2021

Skills

  • Technologies: DWDM, OTN, SDH, Ethernet
  • Programming languages: C programming, Erlang, Starlark
  • Build tools: Bazel, Make, CMake, Rebar, and Shell scripting
  • Protocols: I2C, UART, MDIO
  • Development tools: Jira, GitLab, TestLink, VS Code, and SNMP MIB browser
  • Documentation tools: MkDocs, Sphinx
  • Testing: EUnit, PropEr, Common Test, GTest

Projects

1. 400G muxponder (next-gen platform)

  • Enhanced the 200G muxponder software base to support 400G client and line interfaces, with forward compatibility for 800G
  • Scaled performance monitoring, FEC, and optical signal processing logic to meet next-gen speed requirements

2. 2x100G to 200G muxponder line card

  • Supports OTU4 and 100GE client interfaces mapped to OTUC2 line side with FEC and coherent optics
  • Developed alarm, performance, loopback, and reset modules with Linux driver integration for CFP2 modules

3. 10x10G to 100G muxponder line card

  • Developed software for the aggregation of STM-64/OTU-2/10G LAN signals into OTU-4 using a DIGI-G4 mapper chip
  • Implemented alarm, performance, and FEC logic, along with user-space drivers for optical modules

4. CFP2 and QSFP28 Linux userspace drivers

  • Developed Linux userspace drivers for CFP2 and QSFP28 modules to support OTN, SDH, and Ethernet traffic configuration

5. Bay Monitoring Unit (BMU)

  • Designed a communication interface card between SCC, SCU, and MUX/DEMUX components
  • Enabled transparent packet switching and alarm control (buzzer/potential-free contacts)

6. Versa (Versatile Optical Platform)

  • Architected a unified and scalable codebase for supporting multiple DWDM line cards
  • Focused on code reuse and configuration-driven logic to reduce development time for new variants

Timeline

R&D Engineer | Team Lead

United Telecoms Ltd
02.2021 - Current

Bachelor of Technology - Electronics And Communication Engineering

Jain University

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Rama Sirisha Avvaru