Mental Maths
Innovative Electronics Engineer with a diverse background in Design for Testability (DFT) methodologies and Systems Engineering. Adept in Scan Insertion, ATPG and Boundary Scan techniques. Skilled in HDLs such as Verilog, Tcl Scripting and industry standard Synopys tools. Looking to leverage this unique blend of experiences to contribute effectively to innovative engineering projects.
Scan Insertion
Chipedge Technologies Pvt Ltd DFT Professional training course.
Mental Maths
Singing
Drawing/Painting
Football, Badminton and Tennis
Chipedge Technologies Pvt Ltd DFT Professional training course.