A passionate graduate having master’s in Embedded Systems & VLSI with experience in embedded systems, computer architecture and writing firmware along with robust testing and debugging skills. Seeking opportunities in
core industry to leverage Embedded systems design, firmware production and ASIC validation in a collaborative
environment.
Proficient in using Mentor Graphics software of 18 Xpedition EDM
Design Cockpit for creating the layout. Debugging of circuit ( Analog and Digital). hardware, identified and
resoled issues related to circuitry, connectivity, and component
functionality.
Documented debugging processes, findings, and solutions to facilitate knowledge sharing and continuous improvement in
hardware design practices.
Working with microcontrollers. Documentation with PLM
C language
UART Using Verilog HDL,
Implemented Universal Asynchronous Receiver transmitter communication protocol using Verilog HDL.
Robot Processor Design & Implementation by Enabling Anticollision with RFID Technology
Utilized embedded C/C++ for firmware development and low-level hardware interaction. Integrated RFID technology leveraging protocols such as EPC Gen2 for communication. Employed FPGA/ASIC prototyping for testing and validation of the processor's functionality. RFID Integration: Engineered the processor to seamlessly integrate RFID technology, enabling real-time detection and avoidance of collision-prone areas within the robot's operational environment.
Designed a Synchronous FIFO using Verilog HDL
Implemented a FIFO design of depth 16 and each location having 8 bits. The design included concepts of empty and full pointer which are necessary to determine if the memory is empty or full. Design and Verification of Watchdog Timer using Verilog HDL, Reading and writing events are synchronized to the active edge of the clock. It used two control signals to switch between the reading and writing process. The design was verified using a walking bits pattern.