SHIVA REDDY VARAKANTHAM

Project 1 : USB4 Verification IP Development

Duration : 10 Months

Tools Used : Xcelium, Synopsys, Verdi

Roles & Responsibility :

• Proficient in USB4 TMU and Connection Manager related USB4 specifications, specializing in Test case, Development and Sequence writing.

• Implemented Monitor for TMU and written checks according to the TMU CTS specification for Intra-Domian Time Sync and Inter-Domian Time sync flow.

• Implemented TMU BFM in Inter-Domain Time sync and its modes and also worked on writing Testcases and sequences for it.

• Implemented USB4 V2.0 TMU Adaptive Uni-Directional mode and all necessary calculations for Intra-Domian and Inter-Domian Time sync paths.

• Worked on Integration and implementation of USB4 PCIe tunneling testcases and sequences of USB2 Hub.

• Customer support and implementation specific requirements for xHCI architecture of PCIe tunneling, USB3, USB2 testcases in USB4 VIP.

Project 2 : USB3 Verification IP Development

Duration : 8 Months

Tools Used : Xcelium, Questa

Roles & Responsibility :

• Proficient in understanding USB3 PHY layer, link Layer and PIPE specifications, specializing in Test case

• Testing and debugging of USB3 Gen1x1, Gen 1x2, Gen2x1 and Gen2x2 PHY and Link Layer issue

• Assisted in debugging and root cause analysis of issues found during verification, providing detailed logs and test case data for effective resolution.

• Worked on verifying the USB3 Link Layer Monitor checks.

Project 3 : USB2 Verification IP Development

Duration : 10 Months

Tools Used : Xcelium, Questa

Roles & Responsibility :

• Proficient in understanding USB2, UTMI, xHCI specifications, specializing in Test case development and sequence writing.

• Worked on debugging and implementation of USB2 Hub High speed, full speed, and low speed daTransferli>transfer types which include both periodic and non-periodic transfers.

• Worked on implementation of suspend, resume, and remote wake-up testcases of high speed, full speed devices attached to USB2 Hub.

• Worked on implementation of UB2 BOT and UAS Bulk data transfer types, also worked on writing testcases and sequences on it.

• Worked on verifying and debugging the USB2 Protocol, PHY layer Monitor checks.

• Running testcases, debugging failures and reporting bugs.

Project 4 : USB PD & USB Type-C Verification IP Development

Duration : 8 Months

Tools Used : Xcelium, Questa

Roles & Responsibility :

• Proficient in understanding USB PD and USB Type-C specifications, specializing in Testcase development and sequence writing.

• Worked on verifying and implementing CTS test plan of protocol layer scenarios of source and sink capabilities according to new UUT, discover process and enter mechanism, PR Swap, DR Swap, VCONN Swap request and their timeout mechanisms.

Project 5 : NVMe Verification IP Development

Duration : 5 Months

Tools Used : Synopsys, Verdi

Roles & Responsibility :

• Proficient in understanding NVMe specifications, specializing in Testcase development and sequence writing.

• Worked on verifying and implementing test plan of a component which handles the SQ doorbell ring, SQE fetch, CQE push, PRP list fetch, NVMe Read data and NVMe Write data in DMA requests scenarios with SSD controller.

• Implemented functional coverage for the component which covers all scenarios.