Boni Sowmya Sri
Vizianagaram
Summary
I have hands-on experience in full-custom analog layout design using Cadence Virtuoso with a strong focus on floor planning, routing, and physical verification. I consistently deliver DRC/LVS-clean layouts by applying effective matching, shielding, and reliability techniques. I am motivated to grow as an Analog Layout Engineer and contribute to high-quality VLSI designs.
Overview
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1
Certification
Work History
Trainee – Analog Layout Design
MOSCHIP
Hyderabad
08.2025 - 12.2025
- Trained in analog layout design using Cadence Virtuoso (L and XL) on GPDK 45nm technology.
- Worked on floor planning, placement, routing, and power planning for analog and mixed-signal blocks.
- Designed and verified layouts for PLL, Op-Amp, DAC, Bandgap Reference, Level Shifter, SRAM, and Standard Cells.
- Performed DRC and LVS verification using Pegasus, ensuring clean and manufacturable layouts.
Education
Bachelor of Technology - Electrical And Electronics Engineering
Sri Chaitanya High School
Vizianagaram05-2025
Skills
- Analog layout design
- Physical verification (DRC and LVS)
- Floor planning and power routing
- Layout optimization
- C, C, Python
- Simulation and modeling tools using MATLAB and Simulink
Certification
- Certificate of Internship in Analog Layout - MOSCHIP , AI For Everyone course certificate - Coursera, Salesforce Developer Certificate - Smart Bridge
Timeline
Trainee – Analog Layout Design
MOSCHIP
08.2025 - 12.2025
Bachelor of Technology - Electrical And Electronics Engineering
Sri Chaitanya High School