Sudeshna Khanve

Dedicated and accomplished professional in Hardware system design with 1.5 years of proven expertise in Hardware design and validation, with a keen interest in transitioning expertise to the VLSI industry. Possessing a robust background of Hardware Design and Validation and proven track of on-time delivery. Adept at collaborating in a team, Active learner, Eager to leverage hands-on skills to excel in VLSI Design and Verification and contribute to cutting-edge advancements in the VLSI field.

Advanced VLSI Design and Verification Course

(Maven Silicon VLSI Training Center, Bengaluru)

Mar 2023 - Present

Design

• Digital Electronics, Digital Design using Verilog constructs - combinational design, sequential design, FSM, FIFO design.
• Static Timing Analysis, Timing Path and Constraints, Clock domain and Variations, Clock Distribution Networks.
• RTL Synthesis, Verilog Programming, Code Coverage and writing TestBench in Verilog.
• Understanding of ASIC Design flow, SOC design flow, Low power design.

Verification

• System Verilog for Verification – Constrained random stimulus, Functional coverage, Threads and Interprocess communication, Interface, Data types.
• CRCDV and Regression testing, Object-oriented Programming, Assertion based Verification using SystemVerilog.
• Understanding of UVM – UVM class references, Factory classes, Phasing, Synchronization and UVM sequence.
• Scripting language - Perl scripting.
• Operating system - Linux.

1. Router 1x3 – RTL Design and Verification

EDA Tools: Synopsys DC, Modelsim.

Implemented RTL code using Verilog HDL. Verified RTL model using SV.

2. Implemented serial communication protocol I2C and SPI using Verilog

EDA tools: Quartus prime, Modelsim.

Implemented RTL code for Master and slave.

3. Verification of dual port RAM and MOD12 up down counter using SystemVerilog.

EDA tool: Synopsys VCS.

Implemented TB Environment for 64-bit dual port RAM and MOD12 loadable up down counter using SystemVerilog.

1.Optimum Route choice Navigation based on Air and Noise Pollution Levels. 

Implemented a Navigation system using Air Quality Index data from APIs, which provides route based on AQI data to the user and Heat Map.

Final year project, Programming language - Python.

2. Health Monitoring System using Arduino uno. 

Implemented the Hardware based project using Pulse sensor, temperature sensor, LCD display which monitors heartbeat and body temperature.

Mini Project, (a prototype model for IoT based pulse rate monitor).

• Star award for Q2 - Capgemini Engineering (Aug, 2022)
• Outstanding Contribution in delivery, Team award for Q3 - Capgemini
  Engineering (Nov, 2022)
• Received a letter of Appreciation from Director of Engineering Hardware Business Unit - Capgemini Engineering (May, 2022) for Debugging telecom-based PCB board failure.
• Received a Certificate of Appreciation - Capgemini Engineering (May, 2023) for one year contribution to the team.
• Participated in prestigious IETE (Institution of Electronics & Telecommunication Engineers) Intercollege event, Pune - 2021 and presented insights on Self-resilient India.
• Delivered a captivating keynote speech to a global audience of industry experts at the Capgemini International event RISE (July, 2022) highlighting emerging semiconductor technologies and their impact on the market.

• Coursera - Python for Everybody, CMOS Analog Circuit Design
• openLearn Certificate - Intermediate French
• Udemy - Programming in C++

Reading non-fiction, Gardening, Learning new languages and Self-care.

Hereby, I declare that the information stated above is true to my knowledge and belief.

Name: Sudeshna j. Khanve