As a Motivated and detail-oriented fresher with a strong foundation in Physical Design concepts like Place and route, Clock tree synthesis, and Static timing analysis, I seek an opportunity to apply my skills in a dynamic semiconductor environment. I aim to contribute effectively while continuously learning and growing with the organization.
Overview
1
1
year of professional experience
Work History
Physical Design Intern
Pronesis Technologies
Ahmedabad
01.2025 - 07.2025
Worked on the complete ASIC Physical Design flow, starting from RTL to final GDSII, including stages like synthesis, floor planning, power planning, placement, CTS, routing, and signoff.
Learned to work with essential input files such as LEF, DEF, LIB, and SDC, and understood how they fit into the design process.
Improved my understanding of CMOS fundamentals, Linux basic commands and also Some advance commands like Grep, Sed, Awk.
Also learned about checks After and before all step in the Asic Flow.
Intern
Einfochips - An Arrow Company
Ahmedabad
07.2024 - Current
During My Internship, I gained Extensive experience With Linux. I learned about the RTL to GDS2 Design Flow, As well as CMOS Fabrication Process.