Offering strong foundation in engineering principles and passion for learning and growth in Verification environment.
Overview
2
2
years of professional experience
4044
4044
years of post-secondary education
Work History
Senior Engineer(Verification Engineer)
SAMSUNG SEMICONDUCTOR INDIA RESEARCH
08.2023 - Current
Working as a Design Verification Engineer in SSIR.I worked on two project with SSIR Peripheral team was handed a GPIO block which enhanced my knowledge in UVM,SystemVerilog and debugging the issues in that IP and improved the code and functional coverage to 100%.
Wrote Perl scripts to generate covergroups and bins from config file
Running central Regression (CR) for all blocks and Aanlysing the failures and TB Release with Sfr testing
worked on xprop issues on other peripheral blocks.
Internship(6 months)
Samsung Semiconductor India Research
01.2023 - 07.2023
Worked as a student trainee in Mixed signal Verification team.learned basic skill sets like Verilog,SystemVerilog etc
Good experience in Virtuoso,Simvision
Education
B.tech -
DR Br Ambedkar Institute of Technology
12th - Physics,Chemistry.math
Holy Heart Presidency School
Skills
Protocols like AHB, APB and AXI
Hobbies and Interests
Playing Cricket
Table tennis
Badminton
Tinkering with Arduino and sensors
Accomplishments
Got SPOT award in Samsung Semiconductor India for tremendous work on GPIO testbench verification.