9+ years of Experience CPU performance verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in AMBA AXI, ACE, CHI, TL protocols, Universal Verification Methodology (UVM), SystemVerilog, Verilog, C, CPU(Inorder and Out-Of-Order cores) Architecture, MicroArchtecture(FU, Predictors, Rob and LSU) and SOC level verification. Strong engineering professional with a P.G Diploma focused in Vlsi from Cdac act Pune.
● Dhrystone, Coremark, and some customised benchmarks for memory and uncore(ports) were used to analyze the CPU and bottle-neck performance.
● Understood the CPU configurations. Understood the different performance tuning configurations in a CPU.
● Understanding RISC-V Architecture.
● Understood the configurable System builds. Understood the different performance tuning configurations in a system.
● Understanding ARM Architecture.
● SEPC and LMBENCH benchmark study to Analyze the system and bottle-neck performance.
● APSS_TB, Clock, Reset, Low-power, and Debug module Verification.
● Coding C and SV for Configuration of Trace Components and Bus Monitors.
● Generate trace and verify Trace components.
● AXI Splitter verification.
● APB/ATB/AHB/AXI/ACE VIP Architecture creation with the team.
● Coding of Scoreboard in a fully dynamic object-based environment.
● Coding of Master in a fully dynamic object-based environment.
● Creating a Coverage plan.
● Coding of Coverage.
● Testcase coding, debugging issues, reporting bus, and fixing bugs in Scoreboard, Master and Slave BFM.
● Creating release packaging of VIP.