
DFT Engineer with more than 9 years of experience in DFT. Very well versed in scan insertion, MBIST, LEC, ATPG. Good exposure on ATPG silicon pattern generation, fault grading. Worked on IDDq pattern generation, rail collapse pattern generation. Have good scripting knowledge. Hold Bachelors degree from Aurora's Engineering college.
Scan Insertion, ATPG, MBIST
IDDq, Rail Collapse pattern generation
Silicon Bringup
Leadership Skills
PERL and TCL scripting
Worked on intern for six months
Learned concepts on Digital Design, verification, DFT, Synthesis.
Learned TCL and PERL scripting.