SAURAV RAJ
Bengaluru
Summary
At Alphawave Semi, I spearheaded a team of ten in DFT engineering, achieving successful 7nm node tapeouts and initiating post-silicon bring-up for two chips. Expert in Tessent and Spyglass for DRC checks and proficient in hierarchical DFT planning, my leadership and technical skills ensured project milestones were met efficiently.
Overview
3
3
years of professional experience
Work History
ASIC DESIGN ENGINEER-II
Alphawave Semi
12.2021 - Current
- Utilized Tessent & Spyglass to conduct DRC analysis for scan and MBIST.
- Developed comprehensive DFT strategy for SCAN BSCAN MBIST and 3rd party IP blocks.
- Performed hierarchical Design for Testability (DFT) implementation.
- Managed a team of ten Design-for-Test engineers across two projects achieving successful tapeouts with 7nm node.
- Started engaging in the Post silicon bringup of two distinct chips.
- Executed planning for block and TOP level DFT architectures at the RTL stage.
- Implemented comprehensive testing for Efuse IP.
- Led customer meetings to deliver updates and discuss DFT progress and implementation strategy.
Education
Bachelor of Technology - Electrical Engineering
National Institute Of Science And Technology
Brahmapur, India06-2022
12th - Science
DAV Public School
Rupnarayanpur, India06-2016
10th -
St Joseph's Convent School
Chittaranjan, India06-2014
Skills
1 Input RTL/netlist based DRC checks for SCAN and MBIST through Tessent and Spyglass(Synopsys)
2 Good understanding of DFT architecture definition for blocks for SCAN, MBIST, BSCAN and 3rd party IPs
3 Good understanding of scan-insertion, test compression, ATPG for different fault models, coverage analysis
Good undertaning about the MBIST insertion and Efuse implementation and verification
4Basic understanding of ATPG debug
5 Good understanding of JTAG 11491 and IJTAG (IEEE 1687)
6 Hierarchical DFT planning and implementation for scan
7 Good understanding on LEC, synthesis constraint and STA SDC creation for DFT
8 Tools Known: Spyglass, Tessent, Genus, Conformal, XRUN
9Scripting Language Known: TCL
Hobbies &Interests
- Playing cricket
- Going to gym
- Teaching
Languages
Hindi
English
Timeline
ASIC DESIGN ENGINEER-II
Alphawave Semi
12.2021 - Current
Bachelor of Technology - Electrical Engineering
National Institute Of Science And Technology
12th - Science
DAV Public School
10th -
St Joseph's Convent School
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